c5f3991301fd64f21ea17839c8c979614c17b8ef
[fleet.git] / chips / marina / electric / jtagController.delib / BR.ic
1 HjtagController|8.10k
2
3 # Cell BR;1{ic}
4 CBR;1{ic}||artwork|1029443500000|1185367908213|EI|prototype_center()I[0,0]
5 Ngeneric:Facet-Center|art@0||0|0||||AV
6 NOpened-Thicker-Polygon|art@1||1|15|12|4|||trace()V[-6/-2,6/-2,6/2,-6/2,-6/-2]
7 Ngeneric:Invisible-Pin|pin@0||5|13.75|||||ART_message(D5G1;)S[rd]
8 Ngeneric:Invisible-Pin|pin@1||1|13.75|||||ART_message(D5G1;)S[p2]
9 Ngeneric:Invisible-Pin|pin@2||-3|13.75|||||ART_message(D5G1;)S[p1]
10 Ngeneric:Invisible-Pin|pin@3||6.25|15|||||ART_message(D5G1;)S[So]
11 Ngeneric:Invisible-Pin|pin@4||-4.25|15|||||ART_message(D5G1;)S[Si]
12 Ngeneric:Invisible-Pin|pin@5||1|15.5|||||ART_message(D5G1;)S[Bypass Register]
13 Nschematic:Wire_Pin|pin@6||5|13||||
14 Nschematic:Wire_Pin|pin@7||5|11||||
15 Nschematic:Wire_Pin|pin@8||1|13||||
16 Nschematic:Wire_Pin|pin@9||1|11||||
17 Nschematic:Wire_Pin|pin@10||-3|13||||
18 Nschematic:Wire_Pin|pin@11||-3|11||||
19 Nschematic:Wire_Pin|pin@12||7|15||||
20 Ngeneric:Invisible-Pin|pin@13||9|15||||
21 Nschematic:Wire_Pin|pin@14||-5|15||||
22 Ngeneric:Invisible-Pin|pin@15||-7|15||||
23 Aschematic:wire|net@0|||900|pin@6||5|13|pin@7||5|11
24 Aschematic:wire|net@1|||900|pin@8||1|13|pin@9||1|11
25 Aschematic:wire|net@2|||900|pin@10||-3|13|pin@11||-3|11
26 Aschematic:wire|net@3|||1800|pin@12||7|15|pin@13||9|15
27 Aschematic:wire|net@4|||0|pin@14||-5|15|pin@15||-7|15
28 ESDI||D5G2;|pin@15||I
29 ESDO||D5G2;|pin@13||O
30 Ephi1||D5G2;|pin@11||I
31 Ephi2||D5G2;|pin@9||I
32 Eread||D5G2;|pin@7||I
33 X