chips/marina/electric/oneHotM.delib/onDeck.ic

   1 HoneHotM|8.10k
   2
   3 # Cell onDeck;1{ic}
   4 ConDeck;1{ic}||artwork|1230392901346|1237223015980|E
   5 Ngeneric:Facet-Center|art@0||0|0||||AV
   6 Nschematic:Bus_Pin|pin@1||4|3|-1|-1||
   7 Nschematic:Bus_Pin|pin@2||0|-5|-1|-1||
   8 NPin|pin@3||-3|-4|1|1||
   9 NPin|pin@4||-3|4|1|1||
  10 NPin|pin@5||3|4|1|1||
  11 NPin|pin@6||3|-4|1|1||
  12 Ngeneric:Invisible-Pin|pin@7||0|0|||||ART_message(D5G3;)SOD
  13 NPin|pin@12||0|-4|1|1||
  14 NPin|pin@13||0|-5|1|1||
  15 Nschematic:Bus_Pin|pin@14||-2|5|-1|-1||
  16 Nschematic:Bus_Pin|pin@15||2|6|-1|-1||
  17 NPin|pin@16||-2|4|1|1||
  18 NPin|pin@17||-2|5|1|1||
  19 NPin|pin@18||2|4|1|1||
  20 NPin|pin@19||2|6|1|1||
  21 Nschematic:Bus_Pin|pin@20||-4|-3|-1|-1||
  22 Ngeneric:Invisible-Pin|pin@26||3|3|1|1||
  23 Ngeneric:Invisible-Pin|pin@27||-3|-3|1|1||
  24 NPin|pin@31||-3|3|1|1||
  25 NPin|pin@32||-4|3|1|1||
  26 Nschematic:Bus_Pin|pin@33||-4|3|-1|-1||
  27 Ngeneric:Invisible-Pin|pin@34||-2|-3|||||ART_message(D5G1;)Sw
  28 Nschematic:Bus_Pin|pin@39||-4|0|-1|-1||
  29 Ngeneric:Invisible-Pin|pin@43||-3|0|1|1||
  30 AThicker|net@1|||FS1800|pin@16||-2|4|pin@18||2|4
  31 AThicker|net@3|||FS0|pin@12||0|-4|pin@3||-3|-4
  32 AThicker|net@8|||FS0|pin@6||3|-4|pin@12||0|-4
  33 AThicker|net@9|||FS900|pin@12||0|-4|pin@13||0|-5
  34 AThicker|net@10|||FS1800|pin@4||-3|4|pin@16||-2|4
  35 AThicker|net@11|||FS2700|pin@16||-2|4|pin@17||-2|5
  36 AThicker|net@12|||FS1800|pin@18||2|4|pin@5||3|4
  37 AThicker|net@13|||FS2700|pin@18||2|4|pin@19||2|6
  38 AThicker|net@15|||FS2700|pin@6||3|-4|pin@5||3|4
  39 Aschematic:bus|net@19||-0.5|IJ0|pin@27||-3|-3|pin@20||-4|-3
  40 Aschematic:bus|net@21||-0.5|IJ1800|pin@26||3|3|pin@1||4|3
  41 AThicker|net@29|||FS2700|pin@31||-3|3|pin@4||-3|4
  42 AThicker|net@30|||FS0|pin@31||-3|3|pin@32||-4|3
  43 AThicker|net@33|||FS2700|pin@3||-3|-4|pin@31||-3|3
  44 Aschematic:bus|net@37||-0.5|IJ0|pin@43||-3|0|pin@39||-4|0
  45 EheadBit_1|bits[HEAD,ABORT]|D5G2;|pin@39||I
  46 Etake[P]|fire[od]|D5G2;|pin@2||O
  47 Emc_1|flag[A,D][set,clr]|D5G2;|pin@20||I
  48 Emc||D5G2;|pin@14||I
  49 Esucc|od[HEAD,ABORT,OTHER]|D5G2;|pin@1||O
  50 Emc_1@106580186|pred|D5G2;|pin@33||I
  51 Es[1]|s[1,2]|D5G2;|pin@15||O
  52 X