1 -----------------------------------------------------------------------------
3 -- Machine-dependent assembly language
5 -- (c) The University of Glasgow 1993-2004
7 -----------------------------------------------------------------------------
9 #include "HsVersions.h"
10 #include "nativeGen/NCG.h"
28 = ALWAYS -- For BI (same as BR)
29 | EQQ -- For CMP and BI (NB: "EQ" is a 1.3 Prelude name)
31 | GTT -- For BI only (NB: "GT" is a 1.3 Prelude name)
32 | LE -- For CMP and BI
33 | LTT -- For CMP and BI (NB: "LT" is a 1.3 Prelude name)
35 | NEVER -- For BI (null instruction)
41 -- -----------------------------------------------------------------------------
42 -- Machine's assembly language
44 -- We have a few common "instructions" (nearly all the pseudo-ops) but
45 -- mostly all of 'Instr' is machine-specific.
47 -- Register or immediate
56 -- some static data spat out during code
57 -- generation. Will be extracted before
59 | LDATA Section [CmmStatic]
61 -- start a new basic block. Useful during
62 -- codegen, removed later. Preceding
63 -- instruction should be a jump, as per the
64 -- invariants for a BasicBlock (see Cmm).
67 -- specify current stack offset for
68 -- benefit of subsequent passes
71 -- | spill this reg to a stack slot
74 -- | reload this reg from a stack slot
78 | LD Size Reg AddrMode -- size, dst, src
79 | LDA Reg AddrMode -- dst, src
80 | LDAH Reg AddrMode -- dst, src
81 | LDGP Reg AddrMode -- dst, src
82 | LDI Size Reg Imm -- size, dst, src
83 | ST Size Reg AddrMode -- size, src, dst
87 | ABS Size RI Reg -- size, src, dst
88 | NEG Size Bool RI Reg -- size, overflow, src, dst
89 | ADD Size Bool Reg RI Reg -- size, overflow, src, src, dst
90 | SADD Size Size Reg RI Reg -- size, scale, src, src, dst
91 | SUB Size Bool Reg RI Reg -- size, overflow, src, src, dst
92 | SSUB Size Size Reg RI Reg -- size, scale, src, src, dst
93 | MUL Size Bool Reg RI Reg -- size, overflow, src, src, dst
94 | DIV Size Bool Reg RI Reg -- size, unsigned, src, src, dst
95 | REM Size Bool Reg RI Reg -- size, unsigned, src, src, dst
97 -- Simple bit-twiddling.
115 | CMP Cond Reg RI Reg
121 | FADD Size Reg Reg Reg
122 | FDIV Size Reg Reg Reg
123 | FMUL Size Reg Reg Reg
124 | FSUB Size Reg Reg Reg
125 | CVTxy Size Size Reg Reg
126 | FCMP Size Cond Reg Reg Reg
133 | JMP Reg AddrMode Int
135 | JSR Reg AddrMode Int
137 -- Alpha-specific pseudo-ops.