1 -- | Graph coloring register allocator.
4 -- Live range splitting:
5 -- At the moment regs that are spilled are spilled for all time, even though
6 -- we might be able to allocate them a hardreg in different parts of the code.
8 -- As we're aggressively coalescing before register allocation proper we're not currently
9 -- using the coalescence information present in the graph.
11 -- The function that choosing the potential spills could be a bit cleverer.
13 -- Colors in graphviz graphs could be nicer.
16 {-# OPTIONS_GHC -w #-}
17 -- The above warning supression flag is a temporary kludge.
18 -- While working on this module you are encouraged to remove it and fix
19 -- any warnings in the module. See
20 -- http://hackage.haskell.org/trac/ghc/wiki/WorkingConventions#Warnings
23 module RegAllocColor (
30 import qualified GraphColor as Color
49 -- | The maximum number of build/spill cycles we'll allow.
50 -- We should only need 3 or 4 cycles tops.
51 -- If we run for any longer than this we're probably in an infinite loop,
52 -- It's probably better just to bail out and report a bug at this stage.
57 -- | The top level of the graph coloring register allocator.
60 :: Bool -- ^ whether to generate RegAllocStats, or not.
61 -> UniqFM (UniqSet Reg) -- ^ the registers we can use for allocation
62 -> UniqSet Int -- ^ the set of available spill slots.
63 -> [LiveCmmTop] -- ^ code annotated with liveness information.
65 ( [NatCmmTop] -- ^ code with registers allocated.
66 , [RegAllocStats] ) -- ^ stats for each stage of allocation
68 regAlloc dump regsFree slotsFree code
70 (code_final, debug_codeGraphs, graph_final)
71 <- regAlloc_spin dump 0 trivColorable regsFree slotsFree [] code
74 , reverse debug_codeGraphs )
76 regAlloc_spin dump (spinCount :: Int) triv regsFree slotsFree debug_codeGraphs code
78 -- check that we're not running off down the garden path.
79 when (spinCount > maxSpinCount)
80 $ pprPanic "regAlloc_spin: max build/spill cycle count exceeded."
81 ( text "It looks like the register allocator is stuck in an infinite loop."
82 $$ text "max cycles = " <> int maxSpinCount
83 $$ text "regsFree = " <> (hcat $ punctuate space $ map (docToSDoc . pprUserReg)
84 $ uniqSetToList $ unionManyUniqSets $ eltsUFM regsFree)
85 $$ text "slotsFree = " <> ppr (sizeUniqSet slotsFree))
87 -- build a conflict graph from the code.
88 graph <- buildGraph code
90 -- build a map of how many instructions each reg lives for.
91 -- this is lazy, it won't be computed unless we need to spill
92 let fmLife = plusUFMs_C (\(r1, l1) (r2, l2) -> (r1, l1 + l2))
93 $ map lifetimeCount code
95 -- record startup state
98 then Just $ RegAllocStatsStart
101 , raLifetimes = fmLife }
105 -- the function to choose regs to leave uncolored
106 let spill = chooseSpill_maxLife fmLife
108 -- try and color the graph
109 let (graph_colored, rsSpill, rmCoalesce)
110 = Color.colorGraph regsFree triv spill graph
112 -- rewrite regs in the code that have been coalesced
113 let patchF reg = case lookupUFM rmCoalesce reg of
117 = map (patchEraseLive patchF) code
120 -- see if we've found a coloring
121 if isEmptyUniqSet rsSpill
123 -- patch the registers using the info in the graph
124 let code_patched = map (patchRegsFromGraph graph_colored) code_coalesced
126 -- clean out unneeded SPILL/RELOADs
127 let code_spillclean = map cleanSpills code_patched
129 -- strip off liveness information
130 let code_nat = map stripLive code_patched
132 -- rewrite SPILL/REALOAD pseudos into real instructions
133 let spillNatTop = mapGenBlockTop spillNatBlock
134 let code_final = map spillNatTop code_nat
136 -- record what happened in this stage for debugging
139 { raGraph = graph_colored
140 , raCoalesced = rmCoalesce
141 , raPatched = code_patched
142 , raSpillClean = code_spillclean
143 , raFinal = code_final
144 , raSRMs = foldl addSRM (0, 0, 0) $ map countSRMs code_spillclean }
148 then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
153 -- spill the uncolored regs
154 (code_spilled, slotsFree', spillStats)
155 <- regSpill code_coalesced slotsFree rsSpill
157 -- recalculate liveness
158 let code_nat = map stripLive code_spilled
159 code_relive <- mapM regLiveness code_nat
161 -- record what happened in this stage for debugging
164 { raGraph = graph_colored
165 , raCoalesced = rmCoalesce
166 , raSpillStats = spillStats
167 , raLifetimes = fmLife
168 , raSpilled = code_spilled }
171 regAlloc_spin dump (spinCount + 1) triv regsFree slotsFree'
173 then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
179 -- Simple maxconflicts isn't always good, because we
180 -- can naievely end up spilling vregs that only live for one or two instrs.
183 chooseSpill_maxConflicts
184 :: Color.Graph Reg RegClass Reg
187 chooseSpill_maxConflicts graph
188 = let node = maximumBy
190 (sizeUniqSet $ Color.nodeConflicts n1)
191 (sizeUniqSet $ Color.nodeConflicts n2))
192 $ eltsUFM $ Color.graphMap graph
200 -> Color.Graph Reg RegClass Reg
203 chooseSpill_maxLife life graph
204 = let node = maximumBy (\n1 n2 -> compare (getLife n1) (getLife n2))
205 $ eltsUFM $ Color.graphMap graph
207 -- Orphan vregs die in the same instruction they are born in.
208 -- They will be in the graph, but not in the liveness map.
209 -- Their liveness is 0.
211 = case lookupUFM life (Color.nodeId n) of
218 -- | Build a graph from the liveness and coalesce information in this code.
222 -> UniqSM (Color.Graph Reg RegClass Reg)
226 -- Slurp out the conflicts and reg->reg moves from this code
227 let (conflictList, moveList) =
228 unzip $ map slurpConflicts code
230 let conflictBag = unionManyBags conflictList
231 let moveBag = unionManyBags moveList
233 -- Add the reg-reg conflicts to the graph
234 let graph_conflict = foldrBag graphAddConflictSet Color.initGraph conflictBag
236 -- Add the coalescences edges to the graph.
237 let graph_coalesce = foldrBag graphAddCoalesce graph_conflict moveBag
239 return graph_coalesce
242 -- | Add some conflict edges to the graph.
243 -- Conflicts between virtual and real regs are recorded as exclusions.
247 -> Color.Graph Reg RegClass Reg
248 -> Color.Graph Reg RegClass Reg
250 graphAddConflictSet set graph
251 = let reals = filterUFM isRealReg set
252 virtuals = filterUFM (not . isRealReg) set
254 graph1 = Color.addConflicts virtuals regClass graph
255 graph2 = foldr (\(r1, r2) -> Color.addExclusion r1 regClass r2)
258 | a <- uniqSetToList virtuals
259 , b <- uniqSetToList reals]
264 -- | Add some coalesence edges to the graph
265 -- Coalesences between virtual and real regs are recorded as preferences.
269 -> Color.Graph Reg RegClass Reg
270 -> Color.Graph Reg RegClass Reg
272 graphAddCoalesce (r1, r2) graph
273 | RealReg regno <- r1
274 = Color.addPreference (regWithClass r2) r1 graph
276 | RealReg regno <- r2
277 = Color.addPreference (regWithClass r1) r2 graph
280 = Color.addCoalesce (regWithClass r1) (regWithClass r2) graph
282 where regWithClass r = (r, regClass r)
285 -- | Patch registers in code using the reg -> reg mapping in this graph.
287 :: Color.Graph Reg RegClass Reg
288 -> LiveCmmTop -> LiveCmmTop
290 patchRegsFromGraph graph code
292 -- a function to lookup the hardreg for a virtual reg from the graph.
294 -- leave real regs alone.
298 -- this virtual has a regular node in the graph.
299 | Just node <- Color.lookupNode graph reg
300 = case Color.nodeColor node of
304 -- no node in the graph for this virtual, bad news.
306 = pprPanic "patchRegsFromGraph: register mapping failed."
307 ( text "There is no node in the graph for register " <> ppr reg
309 $$ Color.dotGraph (\x -> text "white") trivColorable graph)
311 in patchEraseLive patchF code
314 plusUFMs_C :: (elt -> elt -> elt) -> [UniqFM elt] -> UniqFM elt
316 = foldl (plusUFM_C f) emptyUFM maps