1 -- | Graph coloring register allocator.
4 -- Live range splitting:
5 -- At the moment regs that are spilled are spilled for all time, even though
6 -- we might be able to allocate them a hardreg in different parts of the code.
8 -- As we're aggressively coalescing before register allocation proper we're not currently
9 -- using the coalescence information present in the graph.
11 -- The function that choosing the potential spills could be a bit cleverer.
13 -- Colors in graphviz graphs could be nicer.
15 {-# OPTIONS -fno-warn-missing-signatures #-}
17 module RegAllocColor (
24 import qualified GraphColor as Color
44 -- | The maximum number of build/spill cycles we'll allow.
45 -- We should only need 3 or 4 cycles tops.
46 -- If we run for any longer than this we're probably in an infinite loop,
47 -- It's probably better just to bail out and report a bug at this stage.
52 -- | The top level of the graph coloring register allocator.
55 :: Bool -- ^ whether to generate RegAllocStats, or not.
56 -> UniqFM (UniqSet Reg) -- ^ the registers we can use for allocation
57 -> UniqSet Int -- ^ the set of available spill slots.
58 -> [LiveCmmTop] -- ^ code annotated with liveness information.
60 ( [NatCmmTop] -- ^ code with registers allocated.
61 , [RegAllocStats] ) -- ^ stats for each stage of allocation
63 regAlloc dump regsFree slotsFree code
65 (code_final, debug_codeGraphs, _)
66 <- regAlloc_spin dump 0 trivColorable regsFree slotsFree [] code
69 , reverse debug_codeGraphs )
71 regAlloc_spin dump (spinCount :: Int) triv regsFree slotsFree debug_codeGraphs code
73 -- check that we're not running off down the garden path.
74 when (spinCount > maxSpinCount)
75 $ pprPanic "regAlloc_spin: max build/spill cycle count exceeded."
76 ( text "It looks like the register allocator is stuck in an infinite loop."
77 $$ text "max cycles = " <> int maxSpinCount
78 $$ text "regsFree = " <> (hcat $ punctuate space $ map (docToSDoc . pprUserReg)
79 $ uniqSetToList $ unionManyUniqSets $ eltsUFM regsFree)
80 $$ text "slotsFree = " <> ppr (sizeUniqSet slotsFree))
82 -- build a conflict graph from the code.
83 graph <- {-# SCC "BuildGraph" #-} buildGraph code
85 -- build a map of how many instructions each reg lives for.
86 -- this is lazy, it won't be computed unless we need to spill
88 let fmLife = {-# SCC "LifetimeCount" #-} plusUFMs_C (\(r1, l1) (_, l2) -> (r1, l1 + l2))
89 $ map lifetimeCount code
91 -- record startup state
94 then Just $ RegAllocStatsStart
97 , raLifetimes = fmLife }
101 -- the function to choose regs to leave uncolored
102 let spill = chooseSpill_maxLife fmLife
104 -- try and color the graph
105 let (graph_colored, rsSpill, rmCoalesce)
106 = {-# SCC "ColorGraph" #-} Color.colorGraph regsFree triv spill graph
108 -- rewrite regs in the code that have been coalesced
109 let patchF reg = case lookupUFM rmCoalesce reg of
113 = map (patchEraseLive patchF) code
116 -- see if we've found a coloring
117 if isEmptyUniqSet rsSpill
119 -- patch the registers using the info in the graph
120 let code_patched = map (patchRegsFromGraph graph_colored) code_coalesced
122 -- clean out unneeded SPILL/RELOADs
123 let code_spillclean = map cleanSpills code_patched
125 -- strip off liveness information
126 let code_nat = map stripLive code_patched
128 -- rewrite SPILL/RELOAD pseudos into real instructions
129 let spillNatTop = mapGenBlockTop spillNatBlock
130 let code_final = map spillNatTop code_nat
132 -- record what happened in this stage for debugging
135 { raGraph = graph_colored
136 , raCoalesced = rmCoalesce
137 , raPatched = code_patched
138 , raSpillClean = code_spillclean
139 , raFinal = code_final
140 , raSRMs = foldl addSRM (0, 0, 0) $ map countSRMs code_spillclean }
144 if dump then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
147 -- space leak avoidance
148 seqList statList $! return ()
155 -- spill the uncolored regs
156 (code_spilled, slotsFree', spillStats)
157 <- regSpill code_coalesced slotsFree rsSpill
159 -- recalculate liveness
160 let code_nat = map stripLive code_spilled
161 code_relive <- mapM regLiveness code_nat
163 -- record what happened in this stage for debugging
166 { raGraph = graph_colored
167 , raCoalesced = rmCoalesce
168 , raSpillStats = spillStats
169 , raLifetimes = fmLife
170 , raSpilled = code_spilled }
174 then [stat] ++ maybeToList stat1 ++ debug_codeGraphs
177 -- space leak avoidance
178 seqList statList $! return ()
180 regAlloc_spin dump (spinCount + 1) triv regsFree slotsFree'
186 -- Simple maxconflicts isn't always good, because we
187 -- can naievely end up spilling vregs that only live for one or two instrs.
190 chooseSpill_maxConflicts
191 :: Color.Graph Reg RegClass Reg
194 chooseSpill_maxConflicts graph
195 = let node = maximumBy
197 (sizeUniqSet $ Color.nodeConflicts n1)
198 (sizeUniqSet $ Color.nodeConflicts n2))
199 $ eltsUFM $ Color.graphMap graph
207 -> Color.Graph Reg RegClass Reg
210 chooseSpill_maxLife life graph
211 = let node = maximumBy (\n1 n2 -> compare (getLife n1) (getLife n2))
212 $ eltsUFM $ Color.graphMap graph
214 -- Orphan vregs die in the same instruction they are born in.
215 -- They will be in the graph, but not in the liveness map.
216 -- Their liveness is 0.
218 = case lookupUFM life (Color.nodeId n) of
225 -- | Build a graph from the liveness and coalesce information in this code.
229 -> UniqSM (Color.Graph Reg RegClass Reg)
233 -- Slurp out the conflicts and reg->reg moves from this code
234 let (conflictList, moveList) =
235 unzip $ map slurpConflicts code
237 let conflictBag = unionManyBags conflictList
238 let moveBag = unionManyBags moveList
240 -- Add the reg-reg conflicts to the graph
241 let graph_conflict = foldrBag graphAddConflictSet Color.initGraph conflictBag
243 -- Add the coalescences edges to the graph.
244 let graph_coalesce = foldrBag graphAddCoalesce graph_conflict moveBag
246 return graph_coalesce
249 -- | Add some conflict edges to the graph.
250 -- Conflicts between virtual and real regs are recorded as exclusions.
254 -> Color.Graph Reg RegClass Reg
255 -> Color.Graph Reg RegClass Reg
257 graphAddConflictSet set graph
258 = let reals = filterUFM isRealReg set
259 virtuals = filterUFM (not . isRealReg) set
261 graph1 = Color.addConflicts virtuals regClass graph
262 graph2 = foldr (\(r1, r2) -> Color.addExclusion r1 regClass r2)
265 | a <- uniqSetToList virtuals
266 , b <- uniqSetToList reals]
271 -- | Add some coalesence edges to the graph
272 -- Coalesences between virtual and real regs are recorded as preferences.
276 -> Color.Graph Reg RegClass Reg
277 -> Color.Graph Reg RegClass Reg
279 graphAddCoalesce (r1, r2) graph
281 = Color.addPreference (regWithClass r2) r1 graph
284 = Color.addPreference (regWithClass r1) r2 graph
287 = Color.addCoalesce (regWithClass r1) (regWithClass r2) graph
289 where regWithClass r = (r, regClass r)
292 -- | Patch registers in code using the reg -> reg mapping in this graph.
294 :: Color.Graph Reg RegClass Reg
295 -> LiveCmmTop -> LiveCmmTop
297 patchRegsFromGraph graph code
299 -- a function to lookup the hardreg for a virtual reg from the graph.
301 -- leave real regs alone.
305 -- this virtual has a regular node in the graph.
306 | Just node <- Color.lookupNode graph reg
307 = case Color.nodeColor node of
311 -- no node in the graph for this virtual, bad news.
313 = pprPanic "patchRegsFromGraph: register mapping failed."
314 ( text "There is no node in the graph for register " <> ppr reg
316 $$ Color.dotGraph (\_ -> text "white") trivColorable graph)
318 in patchEraseLive patchF code
321 plusUFMs_C :: (elt -> elt -> elt) -> [UniqFM elt] -> UniqFM elt
323 = foldl (plusUFM_C f) emptyUFM maps