1 -----------------------------------------------------------------------------
3 -- Pretty-printing assembly language
5 -- (c) The University of Glasgow 1993-2005
7 -----------------------------------------------------------------------------
23 #include "HsVersions.h"
24 #include "nativeGen/NCG.h"
41 import Unique ( pprUnique )
42 import qualified Outputable
43 import Outputable (Outputable, panic)
48 -- -----------------------------------------------------------------------------
49 -- Printing this stuff out
51 pprNatCmmTop :: NatCmmTop Instr -> Doc
52 pprNatCmmTop (CmmData section dats) =
53 pprSectionHeader section $$ vcat (map pprData dats)
55 -- special case for split markers:
56 pprNatCmmTop (CmmProc [] lbl _ (ListGraph [])) = pprLabel lbl
58 pprNatCmmTop (CmmProc info lbl _ (ListGraph blocks)) =
59 pprSectionHeader Text $$
60 (if null info then -- blocks guaranteed not null, so label needed
63 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
64 pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
67 vcat (map pprData info) $$
68 pprLabel (entryLblToInfoLbl lbl)
70 vcat (map pprBasicBlock blocks)
71 -- above: Even the first block gets a label, because with branch-chain
72 -- elimination, it might be the target of a goto.
73 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
74 -- If we are using the .subsections_via_symbols directive
75 -- (available on recent versions of Darwin),
76 -- we have to make sure that there is some kind of reference
77 -- from the entry code to a label on the _top_ of of the info table,
78 -- so that the linker will not think it is unreferenced and dead-strip
79 -- it. That's why the label is called a DeadStripPreventer (_dsp).
82 <+> pprCLabel_asm (entryLblToInfoLbl lbl)
84 <+> pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
89 pprBasicBlock :: NatBasicBlock Instr -> Doc
90 pprBasicBlock (BasicBlock (BlockId id) instrs) =
91 pprLabel (mkAsmTempLabel id) $$
92 vcat (map pprInstr instrs)
95 pprData :: CmmStatic -> Doc
96 pprData (CmmAlign bytes) = pprAlign bytes
97 pprData (CmmDataLabel lbl) = pprLabel lbl
98 pprData (CmmString str) = pprASCII str
99 pprData (CmmUninitialised bytes) = ptext (sLit ".skip ") <> int bytes
100 pprData (CmmStaticLit lit) = pprDataItem lit
102 pprGloblDecl :: CLabel -> Doc
104 | not (externallyVisibleCLabel lbl) = empty
105 | otherwise = ptext IF_ARCH_sparc((sLit ".global "),
109 pprTypeAndSizeDecl :: CLabel -> Doc
111 pprTypeAndSizeDecl lbl
112 | not (externallyVisibleCLabel lbl) = empty
113 | otherwise = ptext (sLit ".type ") <>
114 pprCLabel_asm lbl <> ptext (sLit ", @object")
120 pprLabel :: CLabel -> Doc
121 pprLabel lbl = pprGloblDecl lbl $$ pprTypeAndSizeDecl lbl $$ (pprCLabel_asm lbl <> char ':')
124 pprASCII :: [Word8] -> Doc
126 = vcat (map do1 str) $$ do1 0
129 do1 w = ptext (sLit "\t.byte\t") <> int (fromIntegral w)
131 pprAlign :: Int -> Doc
133 ptext (sLit ".align ") <> int bytes
136 -- -----------------------------------------------------------------------------
137 -- pprInstr: print an 'Instr'
139 instance Outputable Instr where
140 ppr instr = Outputable.docToSDoc $ pprInstr instr
143 -- | Pretty print a register.
144 -- This is an alias of pprReg for legacy reasons, should remove it.
145 pprUserReg :: Reg -> Doc
149 -- | Pretty print a register.
153 RealReg i -> pprReg_ofRegNo i
154 VirtualRegI u -> text "%vI_" <> asmSDoc (pprUnique u)
155 VirtualRegHi u -> text "%vHi_" <> asmSDoc (pprUnique u)
156 VirtualRegF u -> text "%vF_" <> asmSDoc (pprUnique u)
157 VirtualRegD u -> text "%vD_" <> asmSDoc (pprUnique u)
160 -- | Pretty print a register name, based on this register number.
161 -- The definition has been unfolded so we get a jump-table in the
162 -- object code. This function is called quite a lot when emitting the asm file..
164 pprReg_ofRegNo :: Int -> Doc
168 0 -> sLit "%g0"; 1 -> sLit "%g1";
169 2 -> sLit "%g2"; 3 -> sLit "%g3";
170 4 -> sLit "%g4"; 5 -> sLit "%g5";
171 6 -> sLit "%g6"; 7 -> sLit "%g7";
172 8 -> sLit "%o0"; 9 -> sLit "%o1";
173 10 -> sLit "%o2"; 11 -> sLit "%o3";
174 12 -> sLit "%o4"; 13 -> sLit "%o5";
175 14 -> sLit "%o6"; 15 -> sLit "%o7";
176 16 -> sLit "%l0"; 17 -> sLit "%l1";
177 18 -> sLit "%l2"; 19 -> sLit "%l3";
178 20 -> sLit "%l4"; 21 -> sLit "%l5";
179 22 -> sLit "%l6"; 23 -> sLit "%l7";
180 24 -> sLit "%i0"; 25 -> sLit "%i1";
181 26 -> sLit "%i2"; 27 -> sLit "%i3";
182 28 -> sLit "%i4"; 29 -> sLit "%i5";
183 30 -> sLit "%i6"; 31 -> sLit "%i7";
184 32 -> sLit "%f0"; 33 -> sLit "%f1";
185 34 -> sLit "%f2"; 35 -> sLit "%f3";
186 36 -> sLit "%f4"; 37 -> sLit "%f5";
187 38 -> sLit "%f6"; 39 -> sLit "%f7";
188 40 -> sLit "%f8"; 41 -> sLit "%f9";
189 42 -> sLit "%f10"; 43 -> sLit "%f11";
190 44 -> sLit "%f12"; 45 -> sLit "%f13";
191 46 -> sLit "%f14"; 47 -> sLit "%f15";
192 48 -> sLit "%f16"; 49 -> sLit "%f17";
193 50 -> sLit "%f18"; 51 -> sLit "%f19";
194 52 -> sLit "%f20"; 53 -> sLit "%f21";
195 54 -> sLit "%f22"; 55 -> sLit "%f23";
196 56 -> sLit "%f24"; 57 -> sLit "%f25";
197 58 -> sLit "%f26"; 59 -> sLit "%f27";
198 60 -> sLit "%f28"; 61 -> sLit "%f29";
199 62 -> sLit "%f30"; 63 -> sLit "%f31";
200 _ -> sLit "very naughty sparc register" })
203 -- | Pretty print a size for an instruction suffix.
204 pprSize :: Size -> Doc
214 _ -> panic "SPARC.Ppr.pprSize: no match")
217 -- | Pretty print a size for an instruction suffix.
218 -- eg LD is 32bit on sparc, but LDD is 64 bit.
219 pprStSize :: Size -> Doc
229 _ -> panic "SPARC.Ppr.pprSize: no match")
232 -- | Pretty print a condition code.
233 pprCond :: Cond -> Doc
255 -- | Pretty print an address mode.
256 pprAddr :: AddrMode -> Doc
259 AddrRegReg r1 (RealReg 0)
263 -> hcat [ pprReg r1, char '+', pprReg r2 ]
265 AddrRegImm r1 (ImmInt i)
266 | i == 0 -> pprReg r1
267 | not (fits13Bits i) -> largeOffsetError i
268 | otherwise -> hcat [ pprReg r1, pp_sign, int i ]
270 pp_sign = if i > 0 then char '+' else empty
272 AddrRegImm r1 (ImmInteger i)
273 | i == 0 -> pprReg r1
274 | not (fits13Bits i) -> largeOffsetError i
275 | otherwise -> hcat [ pprReg r1, pp_sign, integer i ]
277 pp_sign = if i > 0 then char '+' else empty
280 -> hcat [ pprReg r1, char '+', pprImm imm ]
283 -- | Pretty print an immediate value.
288 ImmInteger i -> integer i
289 ImmCLbl l -> pprCLabel_asm l
290 ImmIndex l i -> pprCLabel_asm l <> char '+' <> int i
294 -> pprImm a <> char '+' <> pprImm b
297 -> pprImm a <> char '-' <> lparen <> pprImm b <> rparen
300 -> hcat [ text "%lo(", pprImm i, rparen ]
303 -> hcat [ text "%hi(", pprImm i, rparen ]
305 -- these should have been converted to bytes and placed
306 -- in the data section.
307 ImmFloat _ -> ptext (sLit "naughty float immediate")
308 ImmDouble _ -> ptext (sLit "naughty double immediate")
311 -- | Pretty print a section \/ segment header.
312 -- On SPARC all the data sections must be at least 8 byte aligned
313 -- incase we store doubles in them.
315 pprSectionHeader :: Section -> Doc
318 Text -> ptext (sLit ".text\n\t.align 4")
319 Data -> ptext (sLit ".data\n\t.align 8")
320 ReadOnlyData -> ptext (sLit ".text\n\t.align 8")
321 RelocatableReadOnlyData -> ptext (sLit ".text\n\t.align 8")
322 UninitialisedData -> ptext (sLit ".bss\n\t.align 8")
323 ReadOnlyData16 -> ptext (sLit ".data\n\t.align 16")
324 OtherSection _ -> panic "PprMach.pprSectionHeader: unknown section"
327 -- | Pretty print a data item.
328 pprDataItem :: CmmLit -> Doc
330 = vcat (ppr_item (cmmTypeSize $ cmmLitType lit) lit)
334 ppr_item II8 _ = [ptext (sLit "\t.byte\t") <> pprImm imm]
335 ppr_item II32 _ = [ptext (sLit "\t.long\t") <> pprImm imm]
337 ppr_item FF32 (CmmFloat r _)
338 = let bs = floatToBytes (fromRational r)
339 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
341 ppr_item FF64 (CmmFloat r _)
342 = let bs = doubleToBytes (fromRational r)
343 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
345 ppr_item II16 _ = [ptext (sLit "\t.short\t") <> pprImm imm]
346 ppr_item II64 _ = [ptext (sLit "\t.quad\t") <> pprImm imm]
347 ppr_item _ _ = panic "SPARC.Ppr.pprDataItem: no match"
350 -- | Pretty print an instruction.
351 pprInstr :: Instr -> Doc
358 = pprInstr (COMMENT (mkFastString ("\tdelta = " ++ show d)))
360 -- Newblocks and LData should have been slurped out before producing the .s file.
361 pprInstr (NEWBLOCK _)
362 = panic "X86.Ppr.pprInstr: NEWBLOCK"
365 = panic "PprMach.pprInstr: LDATA"
368 pprInstr (SPILL reg slot)
370 ptext (sLit "\tSPILL"),
374 ptext (sLit "SLOT") <> parens (int slot)]
376 pprInstr (RELOAD slot reg)
378 ptext (sLit "\tRELOAD"),
380 ptext (sLit "SLOT") <> parens (int slot),
385 -- a clumsy hack for now, to handle possible double alignment problems
386 -- even clumsier, to allow for RegReg regs that show when doing indexed
387 -- reads (bytearrays).
389 -- Translate to the following:
393 -- sub g1,g2,g1 -- to restore g1
395 pprInstr (LD FF64 (AddrRegReg g1 g2) reg)
396 = let Just regH = fPair reg
398 hcat [ptext (sLit "\tadd\t"), pprReg g1, comma, pprReg g2, comma, pprReg g1],
399 hcat [pp_ld_lbracket, pprReg g1, pp_rbracket_comma, pprReg reg],
400 hcat [pp_ld_lbracket, pprReg g1, ptext (sLit "+4]"), comma, pprReg regH],
401 hcat [ptext (sLit "\tsub\t"), pprReg g1, comma, pprReg g2, comma, pprReg g1]
406 -- ld [addr+4],%f(n+1)
407 pprInstr (LD FF64 addr reg)
408 = let Just addr2 = addrOffset addr 4
409 Just regH = fPair reg
411 hcat [pp_ld_lbracket, pprAddr addr, pp_rbracket_comma, pprReg reg],
412 hcat [pp_ld_lbracket, pprAddr addr2, pp_rbracket_comma,pprReg regH]
416 pprInstr (LD size addr reg)
427 -- The same clumsy hack as above
428 -- Translate to the following:
432 -- sub g1,g2,g1 -- to restore g1
434 pprInstr (ST FF64 reg (AddrRegReg g1 g2))
435 = let Just regH = fPair reg
437 hcat [ptext (sLit "\tadd\t"), pprReg g1, comma, pprReg g2, comma, pprReg g1],
438 hcat [ptext (sLit "\tst\t"), pprReg reg, pp_comma_lbracket,
440 hcat [ptext (sLit "\tst\t"), pprReg regH, pp_comma_lbracket,
441 pprReg g1, ptext (sLit "+4]")],
442 hcat [ptext (sLit "\tsub\t"), pprReg g1, comma, pprReg g2, comma, pprReg g1]
447 -- st %f(n+1),[addr+4]
448 pprInstr (ST FF64 reg addr)
449 = let Just addr2 = addrOffset addr 4
450 Just regH = fPair reg
452 hcat [ptext (sLit "\tst\t"), pprReg reg, pp_comma_lbracket,
453 pprAddr addr, rbrack],
454 hcat [ptext (sLit "\tst\t"), pprReg regH, pp_comma_lbracket,
455 pprAddr addr2, rbrack]
459 -- no distinction is made between signed and unsigned bytes on stores for the
460 -- Sparc opcodes (at least I cannot see any, and gas is nagging me --SOF),
461 -- so we call a special-purpose pprSize for ST..
462 pprInstr (ST size reg addr)
474 pprInstr (ADD x cc reg1 ri reg2)
475 | not x && not cc && riZero ri
476 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
479 = pprRegRIReg (if x then sLit "addx" else sLit "add") cc reg1 ri reg2
482 pprInstr (SUB x cc reg1 ri reg2)
483 | not x && cc && reg2 == g0
484 = hcat [ ptext (sLit "\tcmp\t"), pprReg reg1, comma, pprRI ri ]
486 | not x && not cc && riZero ri
487 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
490 = pprRegRIReg (if x then sLit "subx" else sLit "sub") cc reg1 ri reg2
492 pprInstr (AND b reg1 ri reg2) = pprRegRIReg (sLit "and") b reg1 ri reg2
494 pprInstr (ANDN b reg1 ri reg2) = pprRegRIReg (sLit "andn") b reg1 ri reg2
496 pprInstr (OR b reg1 ri reg2)
497 | not b && reg1 == g0
498 = let doit = hcat [ ptext (sLit "\tmov\t"), pprRI ri, comma, pprReg reg2 ]
500 RIReg rrr | rrr == reg2 -> empty
504 = pprRegRIReg (sLit "or") b reg1 ri reg2
506 pprInstr (ORN b reg1 ri reg2) = pprRegRIReg (sLit "orn") b reg1 ri reg2
508 pprInstr (XOR b reg1 ri reg2) = pprRegRIReg (sLit "xor") b reg1 ri reg2
509 pprInstr (XNOR b reg1 ri reg2) = pprRegRIReg (sLit "xnor") b reg1 ri reg2
511 pprInstr (SLL reg1 ri reg2) = pprRegRIReg (sLit "sll") False reg1 ri reg2
512 pprInstr (SRL reg1 ri reg2) = pprRegRIReg (sLit "srl") False reg1 ri reg2
513 pprInstr (SRA reg1 ri reg2) = pprRegRIReg (sLit "sra") False reg1 ri reg2
515 pprInstr (RDY rd) = ptext (sLit "\trd\t%y,") <> pprReg rd
516 pprInstr (WRY reg1 reg2)
517 = ptext (sLit "\twr\t")
524 pprInstr (SMUL b reg1 ri reg2) = pprRegRIReg (sLit "smul") b reg1 ri reg2
525 pprInstr (UMUL b reg1 ri reg2) = pprRegRIReg (sLit "umul") b reg1 ri reg2
526 pprInstr (SDIV b reg1 ri reg2) = pprRegRIReg (sLit "sdiv") b reg1 ri reg2
527 pprInstr (UDIV b reg1 ri reg2) = pprRegRIReg (sLit "udiv") b reg1 ri reg2
529 pprInstr (SETHI imm reg)
531 ptext (sLit "\tsethi\t"),
537 pprInstr NOP = ptext (sLit "\tnop")
539 pprInstr (FABS FF32 reg1 reg2) = pprSizeRegReg (sLit "fabs") FF32 reg1 reg2
540 pprInstr (FABS FF64 reg1 reg2)
541 = let Just reg1H = fPair reg1
542 Just reg2H = fPair reg2
544 (<>) (pprSizeRegReg (sLit "fabs") FF32 reg1 reg2)
545 (if (reg1 == reg2) then empty
546 else (<>) (char '\n')
547 (pprSizeRegReg (sLit "fmov") FF32 reg1H reg2H))
549 pprInstr (FABS _ _ _)
550 =panic "SPARC.Ppr.pprInstr(FABS): no match"
552 pprInstr (FADD size reg1 reg2 reg3)
553 = pprSizeRegRegReg (sLit "fadd") size reg1 reg2 reg3
555 pprInstr (FCMP e size reg1 reg2)
556 = pprSizeRegReg (if e then sLit "fcmpe" else sLit "fcmp") size reg1 reg2
558 pprInstr (FDIV size reg1 reg2 reg3)
559 = pprSizeRegRegReg (sLit "fdiv") size reg1 reg2 reg3
561 pprInstr (FMOV FF32 reg1 reg2) = pprSizeRegReg (sLit "fmov") FF32 reg1 reg2
562 pprInstr (FMOV FF64 reg1 reg2) = pprSizeRegReg (sLit "fmov") FF64 reg1 reg2
564 pprInstr (FMOV _ _ _)
565 = panic "SPARC.Ppr.pprInstr(FMOV): no match"
568 pprInstr (FMOV FF64 reg1 reg2)
569 = let Just reg1H = fPair reg1
570 Just reg2H = fPair reg2
572 (<>) (pprSizeRegReg (sLit "fmov") FF32 reg1 reg2)
573 (if (reg1 == reg2) then empty
574 else (<>) (char '\n')
575 (pprSizeRegReg (sLit "fmov") FF32 reg1H reg2H))
578 pprInstr (FMUL size reg1 reg2 reg3)
579 = pprSizeRegRegReg (sLit "fmul") size reg1 reg2 reg3
581 pprInstr (FNEG FF32 reg1 reg2)
582 = pprSizeRegReg (sLit "fneg") FF32 reg1 reg2
584 pprInstr (FNEG FF64 reg1 reg2)
585 = let Just reg1H = fPair reg1
586 Just reg2H = fPair reg2
588 (<>) (pprSizeRegReg (sLit "fneg") FF32 reg1 reg2)
589 (if (reg1 == reg2) then empty
590 else (<>) (char '\n')
591 (pprSizeRegReg (sLit "fmov") FF32 reg1H reg2H))
593 pprInstr (FNEG _ _ _)
594 = panic "SPARC.Ppr.pprInstr(FNEG): no match"
596 pprInstr (FSQRT size reg1 reg2)
597 = pprSizeRegReg (sLit "fsqrt") size reg1 reg2
599 pprInstr (FSUB size reg1 reg2 reg3)
600 = pprSizeRegRegReg (sLit "fsub") size reg1 reg2 reg3
602 pprInstr (FxTOy size1 size2 reg1 reg2)
610 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
617 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
618 pprReg reg1, comma, pprReg reg2
622 pprInstr (BI cond b (BlockId id))
624 ptext (sLit "\tb"), pprCond cond,
625 if b then pp_comma_a else empty,
627 pprCLabel_asm (mkAsmTempLabel id)
630 pprInstr (BF cond b (BlockId id))
632 ptext (sLit "\tfb"), pprCond cond,
633 if b then pp_comma_a else empty,
635 pprCLabel_asm (mkAsmTempLabel id)
638 pprInstr (JMP addr) = (<>) (ptext (sLit "\tjmp\t")) (pprAddr addr)
639 pprInstr (JMP_TBL op _) = pprInstr (JMP op)
641 pprInstr (CALL (Left imm) n _)
642 = hcat [ ptext (sLit "\tcall\t"), pprImm imm, comma, int n ]
643 pprInstr (CALL (Right reg) n _)
644 = hcat [ ptext (sLit "\tcall\t"), pprReg reg, comma, int n ]
647 -- | Pretty print a RI
649 pprRI (RIReg r) = pprReg r
650 pprRI (RIImm r) = pprImm r
653 -- | Pretty print a two reg instruction.
654 pprSizeRegReg :: LitString -> Size -> Reg -> Reg -> Doc
655 pprSizeRegReg name size reg1 reg2
660 FF32 -> ptext (sLit "s\t")
661 FF64 -> ptext (sLit "d\t")
662 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
670 -- | Pretty print a three reg instruction.
671 pprSizeRegRegReg :: LitString -> Size -> Reg -> Reg -> Reg -> Doc
672 pprSizeRegRegReg name size reg1 reg2 reg3
677 FF32 -> ptext (sLit "s\t")
678 FF64 -> ptext (sLit "d\t")
679 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
688 -- | Pretty print an instruction of two regs and a ri.
689 pprRegRIReg :: LitString -> Bool -> Reg -> RI -> Reg -> Doc
690 pprRegRIReg name b reg1 ri reg2
694 if b then ptext (sLit "cc\t") else char '\t',
703 pprRIReg :: LitString -> Bool -> RI -> Reg -> Doc
704 pprRIReg name b ri reg1
708 if b then ptext (sLit "cc\t") else char '\t',
716 pp_ld_lbracket :: Doc
717 pp_ld_lbracket = ptext (sLit "\tld\t[")
720 pp_rbracket_comma :: Doc
721 pp_rbracket_comma = text "],"
724 pp_comma_lbracket :: Doc
725 pp_comma_lbracket = text ",["
729 pp_comma_a = text ",a"