1 -----------------------------------------------------------------------------
3 -- Pretty-printing assembly language
5 -- (c) The University of Glasgow 1993-2005
7 -----------------------------------------------------------------------------
23 #include "HsVersions.h"
24 #include "nativeGen/NCG.h"
41 import Unique ( Uniquable(..), pprUnique )
42 import qualified Outputable
43 import Outputable (Outputable, panic)
48 -- -----------------------------------------------------------------------------
49 -- Printing this stuff out
51 pprNatCmmTop :: NatCmmTop Instr -> Doc
52 pprNatCmmTop (CmmData section dats) =
53 pprSectionHeader section $$ vcat (map pprData dats)
55 -- special case for split markers:
56 pprNatCmmTop (CmmProc [] lbl (ListGraph [])) = pprLabel lbl
58 pprNatCmmTop (CmmProc info lbl (ListGraph blocks)) =
59 pprSectionHeader Text $$
60 (if null info then -- blocks guaranteed not null, so label needed
63 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
64 pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
67 vcat (map pprData info) $$
68 pprLabel (entryLblToInfoLbl lbl)
70 vcat (map pprBasicBlock blocks)
71 -- above: Even the first block gets a label, because with branch-chain
72 -- elimination, it might be the target of a goto.
73 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
74 -- If we are using the .subsections_via_symbols directive
75 -- (available on recent versions of Darwin),
76 -- we have to make sure that there is some kind of reference
77 -- from the entry code to a label on the _top_ of of the info table,
78 -- so that the linker will not think it is unreferenced and dead-strip
79 -- it. That's why the label is called a DeadStripPreventer (_dsp).
82 <+> pprCLabel_asm (entryLblToInfoLbl lbl)
84 <+> pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
89 pprBasicBlock :: NatBasicBlock Instr -> Doc
90 pprBasicBlock (BasicBlock blockid instrs) =
91 pprLabel (mkAsmTempLabel (getUnique blockid)) $$
92 vcat (map pprInstr instrs)
95 pprData :: CmmStatic -> Doc
96 pprData (CmmAlign bytes) = pprAlign bytes
97 pprData (CmmDataLabel lbl) = pprLabel lbl
98 pprData (CmmString str) = pprASCII str
99 pprData (CmmUninitialised bytes) = ptext (sLit ".skip ") <> int bytes
100 pprData (CmmStaticLit lit) = pprDataItem lit
102 pprGloblDecl :: CLabel -> Doc
104 | not (externallyVisibleCLabel lbl) = empty
105 | otherwise = ptext IF_ARCH_sparc((sLit ".global "),
109 pprTypeAndSizeDecl :: CLabel -> Doc
111 pprTypeAndSizeDecl lbl
112 | not (externallyVisibleCLabel lbl) = empty
113 | otherwise = ptext (sLit ".type ") <>
114 pprCLabel_asm lbl <> ptext (sLit ", @object")
120 pprLabel :: CLabel -> Doc
121 pprLabel lbl = pprGloblDecl lbl $$ pprTypeAndSizeDecl lbl $$ (pprCLabel_asm lbl <> char ':')
124 pprASCII :: [Word8] -> Doc
126 = vcat (map do1 str) $$ do1 0
129 do1 w = ptext (sLit "\t.byte\t") <> int (fromIntegral w)
131 pprAlign :: Int -> Doc
133 ptext (sLit ".align ") <> int bytes
136 -- -----------------------------------------------------------------------------
137 -- pprInstr: print an 'Instr'
139 instance Outputable Instr where
140 ppr instr = Outputable.docToSDoc $ pprInstr instr
143 -- | Pretty print a register.
144 -- This is an alias of pprReg for legacy reasons, should remove it.
145 pprUserReg :: Reg -> Doc
149 -- | Pretty print a register.
155 VirtualRegI u -> text "%vI_" <> asmSDoc (pprUnique u)
156 VirtualRegHi u -> text "%vHi_" <> asmSDoc (pprUnique u)
157 VirtualRegF u -> text "%vF_" <> asmSDoc (pprUnique u)
158 VirtualRegD u -> text "%vD_" <> asmSDoc (pprUnique u)
159 VirtualRegSSE u -> text "%vSSE_" <> asmSDoc (pprUnique u)
167 -> text "(" <> pprReg_ofRegNo r1
168 <> text "|" <> pprReg_ofRegNo r2
173 -- | Pretty print a register name, based on this register number.
174 -- The definition has been unfolded so we get a jump-table in the
175 -- object code. This function is called quite a lot when emitting the asm file..
177 pprReg_ofRegNo :: Int -> Doc
181 0 -> sLit "%g0"; 1 -> sLit "%g1";
182 2 -> sLit "%g2"; 3 -> sLit "%g3";
183 4 -> sLit "%g4"; 5 -> sLit "%g5";
184 6 -> sLit "%g6"; 7 -> sLit "%g7";
185 8 -> sLit "%o0"; 9 -> sLit "%o1";
186 10 -> sLit "%o2"; 11 -> sLit "%o3";
187 12 -> sLit "%o4"; 13 -> sLit "%o5";
188 14 -> sLit "%o6"; 15 -> sLit "%o7";
189 16 -> sLit "%l0"; 17 -> sLit "%l1";
190 18 -> sLit "%l2"; 19 -> sLit "%l3";
191 20 -> sLit "%l4"; 21 -> sLit "%l5";
192 22 -> sLit "%l6"; 23 -> sLit "%l7";
193 24 -> sLit "%i0"; 25 -> sLit "%i1";
194 26 -> sLit "%i2"; 27 -> sLit "%i3";
195 28 -> sLit "%i4"; 29 -> sLit "%i5";
196 30 -> sLit "%i6"; 31 -> sLit "%i7";
197 32 -> sLit "%f0"; 33 -> sLit "%f1";
198 34 -> sLit "%f2"; 35 -> sLit "%f3";
199 36 -> sLit "%f4"; 37 -> sLit "%f5";
200 38 -> sLit "%f6"; 39 -> sLit "%f7";
201 40 -> sLit "%f8"; 41 -> sLit "%f9";
202 42 -> sLit "%f10"; 43 -> sLit "%f11";
203 44 -> sLit "%f12"; 45 -> sLit "%f13";
204 46 -> sLit "%f14"; 47 -> sLit "%f15";
205 48 -> sLit "%f16"; 49 -> sLit "%f17";
206 50 -> sLit "%f18"; 51 -> sLit "%f19";
207 52 -> sLit "%f20"; 53 -> sLit "%f21";
208 54 -> sLit "%f22"; 55 -> sLit "%f23";
209 56 -> sLit "%f24"; 57 -> sLit "%f25";
210 58 -> sLit "%f26"; 59 -> sLit "%f27";
211 60 -> sLit "%f28"; 61 -> sLit "%f29";
212 62 -> sLit "%f30"; 63 -> sLit "%f31";
213 _ -> sLit "very naughty sparc register" })
216 -- | Pretty print a size for an instruction suffix.
217 pprSize :: Size -> Doc
227 _ -> panic "SPARC.Ppr.pprSize: no match")
230 -- | Pretty print a size for an instruction suffix.
231 -- eg LD is 32bit on sparc, but LDD is 64 bit.
232 pprStSize :: Size -> Doc
242 _ -> panic "SPARC.Ppr.pprSize: no match")
245 -- | Pretty print a condition code.
246 pprCond :: Cond -> Doc
268 -- | Pretty print an address mode.
269 pprAddr :: AddrMode -> Doc
272 AddrRegReg r1 (RegReal (RealRegSingle 0))
276 -> hcat [ pprReg r1, char '+', pprReg r2 ]
278 AddrRegImm r1 (ImmInt i)
279 | i == 0 -> pprReg r1
280 | not (fits13Bits i) -> largeOffsetError i
281 | otherwise -> hcat [ pprReg r1, pp_sign, int i ]
283 pp_sign = if i > 0 then char '+' else empty
285 AddrRegImm r1 (ImmInteger i)
286 | i == 0 -> pprReg r1
287 | not (fits13Bits i) -> largeOffsetError i
288 | otherwise -> hcat [ pprReg r1, pp_sign, integer i ]
290 pp_sign = if i > 0 then char '+' else empty
293 -> hcat [ pprReg r1, char '+', pprImm imm ]
296 -- | Pretty print an immediate value.
301 ImmInteger i -> integer i
302 ImmCLbl l -> pprCLabel_asm l
303 ImmIndex l i -> pprCLabel_asm l <> char '+' <> int i
307 -> pprImm a <> char '+' <> pprImm b
310 -> pprImm a <> char '-' <> lparen <> pprImm b <> rparen
313 -> hcat [ text "%lo(", pprImm i, rparen ]
316 -> hcat [ text "%hi(", pprImm i, rparen ]
318 -- these should have been converted to bytes and placed
319 -- in the data section.
320 ImmFloat _ -> ptext (sLit "naughty float immediate")
321 ImmDouble _ -> ptext (sLit "naughty double immediate")
324 -- | Pretty print a section \/ segment header.
325 -- On SPARC all the data sections must be at least 8 byte aligned
326 -- incase we store doubles in them.
328 pprSectionHeader :: Section -> Doc
331 Text -> ptext (sLit ".text\n\t.align 4")
332 Data -> ptext (sLit ".data\n\t.align 8")
333 ReadOnlyData -> ptext (sLit ".text\n\t.align 8")
334 RelocatableReadOnlyData -> ptext (sLit ".text\n\t.align 8")
335 UninitialisedData -> ptext (sLit ".bss\n\t.align 8")
336 ReadOnlyData16 -> ptext (sLit ".data\n\t.align 16")
337 OtherSection _ -> panic "PprMach.pprSectionHeader: unknown section"
340 -- | Pretty print a data item.
341 pprDataItem :: CmmLit -> Doc
343 = vcat (ppr_item (cmmTypeSize $ cmmLitType lit) lit)
347 ppr_item II8 _ = [ptext (sLit "\t.byte\t") <> pprImm imm]
348 ppr_item II32 _ = [ptext (sLit "\t.long\t") <> pprImm imm]
350 ppr_item FF32 (CmmFloat r _)
351 = let bs = floatToBytes (fromRational r)
352 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
354 ppr_item FF64 (CmmFloat r _)
355 = let bs = doubleToBytes (fromRational r)
356 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
358 ppr_item II16 _ = [ptext (sLit "\t.short\t") <> pprImm imm]
359 ppr_item II64 _ = [ptext (sLit "\t.quad\t") <> pprImm imm]
360 ppr_item _ _ = panic "SPARC.Ppr.pprDataItem: no match"
363 -- | Pretty print an instruction.
364 pprInstr :: Instr -> Doc
371 = pprInstr (COMMENT (mkFastString ("\tdelta = " ++ show d)))
373 -- Newblocks and LData should have been slurped out before producing the .s file.
374 pprInstr (NEWBLOCK _)
375 = panic "X86.Ppr.pprInstr: NEWBLOCK"
378 = panic "PprMach.pprInstr: LDATA"
380 -- 64 bit FP loads are expanded into individual instructions in CodeGen.Expand
381 pprInstr (LD FF64 _ reg)
382 | RegReal (RealRegSingle{}) <- reg
383 = panic "SPARC.Ppr: not emitting potentially misaligned LD FF64 instr"
385 pprInstr (LD size addr reg)
396 -- 64 bit FP storees are expanded into individual instructions in CodeGen.Expand
397 pprInstr (ST FF64 reg _)
398 | RegReal (RealRegSingle{}) <- reg
399 = panic "SPARC.Ppr: not emitting potentially misaligned ST FF64 instr"
401 -- no distinction is made between signed and unsigned bytes on stores for the
402 -- Sparc opcodes (at least I cannot see any, and gas is nagging me --SOF),
403 -- so we call a special-purpose pprSize for ST..
404 pprInstr (ST size reg addr)
416 pprInstr (ADD x cc reg1 ri reg2)
417 | not x && not cc && riZero ri
418 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
421 = pprRegRIReg (if x then sLit "addx" else sLit "add") cc reg1 ri reg2
424 pprInstr (SUB x cc reg1 ri reg2)
425 | not x && cc && reg2 == g0
426 = hcat [ ptext (sLit "\tcmp\t"), pprReg reg1, comma, pprRI ri ]
428 | not x && not cc && riZero ri
429 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
432 = pprRegRIReg (if x then sLit "subx" else sLit "sub") cc reg1 ri reg2
434 pprInstr (AND b reg1 ri reg2) = pprRegRIReg (sLit "and") b reg1 ri reg2
436 pprInstr (ANDN b reg1 ri reg2) = pprRegRIReg (sLit "andn") b reg1 ri reg2
438 pprInstr (OR b reg1 ri reg2)
439 | not b && reg1 == g0
440 = let doit = hcat [ ptext (sLit "\tmov\t"), pprRI ri, comma, pprReg reg2 ]
442 RIReg rrr | rrr == reg2 -> empty
446 = pprRegRIReg (sLit "or") b reg1 ri reg2
448 pprInstr (ORN b reg1 ri reg2) = pprRegRIReg (sLit "orn") b reg1 ri reg2
450 pprInstr (XOR b reg1 ri reg2) = pprRegRIReg (sLit "xor") b reg1 ri reg2
451 pprInstr (XNOR b reg1 ri reg2) = pprRegRIReg (sLit "xnor") b reg1 ri reg2
453 pprInstr (SLL reg1 ri reg2) = pprRegRIReg (sLit "sll") False reg1 ri reg2
454 pprInstr (SRL reg1 ri reg2) = pprRegRIReg (sLit "srl") False reg1 ri reg2
455 pprInstr (SRA reg1 ri reg2) = pprRegRIReg (sLit "sra") False reg1 ri reg2
457 pprInstr (RDY rd) = ptext (sLit "\trd\t%y,") <> pprReg rd
458 pprInstr (WRY reg1 reg2)
459 = ptext (sLit "\twr\t")
466 pprInstr (SMUL b reg1 ri reg2) = pprRegRIReg (sLit "smul") b reg1 ri reg2
467 pprInstr (UMUL b reg1 ri reg2) = pprRegRIReg (sLit "umul") b reg1 ri reg2
468 pprInstr (SDIV b reg1 ri reg2) = pprRegRIReg (sLit "sdiv") b reg1 ri reg2
469 pprInstr (UDIV b reg1 ri reg2) = pprRegRIReg (sLit "udiv") b reg1 ri reg2
471 pprInstr (SETHI imm reg)
473 ptext (sLit "\tsethi\t"),
480 = ptext (sLit "\tnop")
482 pprInstr (FABS size reg1 reg2)
483 = pprSizeRegReg (sLit "fabs") size reg1 reg2
485 pprInstr (FADD size reg1 reg2 reg3)
486 = pprSizeRegRegReg (sLit "fadd") size reg1 reg2 reg3
488 pprInstr (FCMP e size reg1 reg2)
489 = pprSizeRegReg (if e then sLit "fcmpe" else sLit "fcmp") size reg1 reg2
491 pprInstr (FDIV size reg1 reg2 reg3)
492 = pprSizeRegRegReg (sLit "fdiv") size reg1 reg2 reg3
494 pprInstr (FMOV size reg1 reg2)
495 = pprSizeRegReg (sLit "fmov") size reg1 reg2
497 pprInstr (FMUL size reg1 reg2 reg3)
498 = pprSizeRegRegReg (sLit "fmul") size reg1 reg2 reg3
500 pprInstr (FNEG size reg1 reg2)
501 = pprSizeRegReg (sLit "fneg") size reg1 reg2
503 pprInstr (FSQRT size reg1 reg2)
504 = pprSizeRegReg (sLit "fsqrt") size reg1 reg2
506 pprInstr (FSUB size reg1 reg2 reg3)
507 = pprSizeRegRegReg (sLit "fsub") size reg1 reg2 reg3
509 pprInstr (FxTOy size1 size2 reg1 reg2)
517 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
524 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
525 pprReg reg1, comma, pprReg reg2
529 pprInstr (BI cond b blockid)
531 ptext (sLit "\tb"), pprCond cond,
532 if b then pp_comma_a else empty,
534 pprCLabel_asm (mkAsmTempLabel (getUnique blockid))
537 pprInstr (BF cond b blockid)
539 ptext (sLit "\tfb"), pprCond cond,
540 if b then pp_comma_a else empty,
542 pprCLabel_asm (mkAsmTempLabel (getUnique blockid))
545 pprInstr (JMP addr) = (<>) (ptext (sLit "\tjmp\t")) (pprAddr addr)
546 pprInstr (JMP_TBL op _ _) = pprInstr (JMP op)
548 pprInstr (CALL (Left imm) n _)
549 = hcat [ ptext (sLit "\tcall\t"), pprImm imm, comma, int n ]
551 pprInstr (CALL (Right reg) n _)
552 = hcat [ ptext (sLit "\tcall\t"), pprReg reg, comma, int n ]
555 -- | Pretty print a RI
557 pprRI (RIReg r) = pprReg r
558 pprRI (RIImm r) = pprImm r
561 -- | Pretty print a two reg instruction.
562 pprSizeRegReg :: LitString -> Size -> Reg -> Reg -> Doc
563 pprSizeRegReg name size reg1 reg2
568 FF32 -> ptext (sLit "s\t")
569 FF64 -> ptext (sLit "d\t")
570 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
578 -- | Pretty print a three reg instruction.
579 pprSizeRegRegReg :: LitString -> Size -> Reg -> Reg -> Reg -> Doc
580 pprSizeRegRegReg name size reg1 reg2 reg3
585 FF32 -> ptext (sLit "s\t")
586 FF64 -> ptext (sLit "d\t")
587 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
596 -- | Pretty print an instruction of two regs and a ri.
597 pprRegRIReg :: LitString -> Bool -> Reg -> RI -> Reg -> Doc
598 pprRegRIReg name b reg1 ri reg2
602 if b then ptext (sLit "cc\t") else char '\t',
611 pprRIReg :: LitString -> Bool -> RI -> Reg -> Doc
612 pprRIReg name b ri reg1
616 if b then ptext (sLit "cc\t") else char '\t',
624 pp_ld_lbracket :: Doc
625 pp_ld_lbracket = ptext (sLit "\tld\t[")
628 pp_rbracket_comma :: Doc
629 pp_rbracket_comma = text "],"
632 pp_comma_lbracket :: Doc
633 pp_comma_lbracket = text ",["
637 pp_comma_a = text ",a"