1 -----------------------------------------------------------------------------
3 -- Pretty-printing assembly language
5 -- (c) The University of Glasgow 1993-2005
7 -----------------------------------------------------------------------------
22 #include "HsVersions.h"
23 #include "nativeGen/NCG.h"
40 import Unique ( Uniquable(..), pprUnique )
41 import qualified Outputable
42 import Outputable (Outputable, panic)
47 -- -----------------------------------------------------------------------------
48 -- Printing this stuff out
50 pprNatCmmTop :: NatCmmTop Instr -> Doc
51 pprNatCmmTop (CmmData section dats) =
52 pprSectionHeader section $$ vcat (map pprData dats)
54 -- special case for split markers:
55 pprNatCmmTop (CmmProc [] lbl (ListGraph [])) = pprLabel lbl
57 pprNatCmmTop (CmmProc info lbl (ListGraph blocks)) =
58 pprSectionHeader Text $$
59 (if null info then -- blocks guaranteed not null, so label needed
62 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
63 pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
66 vcat (map pprData info) $$
67 pprLabel (entryLblToInfoLbl lbl)
69 vcat (map pprBasicBlock blocks)
70 -- above: Even the first block gets a label, because with branch-chain
71 -- elimination, it might be the target of a goto.
72 #if HAVE_SUBSECTIONS_VIA_SYMBOLS
73 -- If we are using the .subsections_via_symbols directive
74 -- (available on recent versions of Darwin),
75 -- we have to make sure that there is some kind of reference
76 -- from the entry code to a label on the _top_ of of the info table,
77 -- so that the linker will not think it is unreferenced and dead-strip
78 -- it. That's why the label is called a DeadStripPreventer (_dsp).
81 <+> pprCLabel_asm (entryLblToInfoLbl lbl)
83 <+> pprCLabel_asm (mkDeadStripPreventer $ entryLblToInfoLbl lbl)
88 pprBasicBlock :: NatBasicBlock Instr -> Doc
89 pprBasicBlock (BasicBlock blockid instrs) =
90 pprLabel (mkAsmTempLabel (getUnique blockid)) $$
91 vcat (map pprInstr instrs)
94 pprData :: CmmStatic -> Doc
95 pprData (CmmAlign bytes) = pprAlign bytes
96 pprData (CmmDataLabel lbl) = pprLabel lbl
97 pprData (CmmString str) = pprASCII str
98 pprData (CmmUninitialised bytes) = ptext (sLit ".skip ") <> int bytes
99 pprData (CmmStaticLit lit) = pprDataItem lit
101 pprGloblDecl :: CLabel -> Doc
103 | not (externallyVisibleCLabel lbl) = empty
104 | otherwise = ptext IF_ARCH_sparc((sLit ".global "),
108 pprTypeAndSizeDecl :: CLabel -> Doc
110 pprTypeAndSizeDecl lbl
111 | not (externallyVisibleCLabel lbl) = empty
112 | otherwise = ptext (sLit ".type ") <>
113 pprCLabel_asm lbl <> ptext (sLit ", @object")
119 pprLabel :: CLabel -> Doc
120 pprLabel lbl = pprGloblDecl lbl $$ pprTypeAndSizeDecl lbl $$ (pprCLabel_asm lbl <> char ':')
123 pprASCII :: [Word8] -> Doc
125 = vcat (map do1 str) $$ do1 0
128 do1 w = ptext (sLit "\t.byte\t") <> int (fromIntegral w)
130 pprAlign :: Int -> Doc
132 ptext (sLit ".align ") <> int bytes
135 -- -----------------------------------------------------------------------------
136 -- pprInstr: print an 'Instr'
138 instance Outputable Instr where
139 ppr instr = Outputable.docToSDoc $ pprInstr instr
142 -- | Pretty print a register.
148 VirtualRegI u -> text "%vI_" <> asmSDoc (pprUnique u)
149 VirtualRegHi u -> text "%vHi_" <> asmSDoc (pprUnique u)
150 VirtualRegF u -> text "%vF_" <> asmSDoc (pprUnique u)
151 VirtualRegD u -> text "%vD_" <> asmSDoc (pprUnique u)
152 VirtualRegSSE u -> text "%vSSE_" <> asmSDoc (pprUnique u)
160 -> text "(" <> pprReg_ofRegNo r1
161 <> text "|" <> pprReg_ofRegNo r2
166 -- | Pretty print a register name, based on this register number.
167 -- The definition has been unfolded so we get a jump-table in the
168 -- object code. This function is called quite a lot when emitting the asm file..
170 pprReg_ofRegNo :: Int -> Doc
174 0 -> sLit "%g0"; 1 -> sLit "%g1";
175 2 -> sLit "%g2"; 3 -> sLit "%g3";
176 4 -> sLit "%g4"; 5 -> sLit "%g5";
177 6 -> sLit "%g6"; 7 -> sLit "%g7";
178 8 -> sLit "%o0"; 9 -> sLit "%o1";
179 10 -> sLit "%o2"; 11 -> sLit "%o3";
180 12 -> sLit "%o4"; 13 -> sLit "%o5";
181 14 -> sLit "%o6"; 15 -> sLit "%o7";
182 16 -> sLit "%l0"; 17 -> sLit "%l1";
183 18 -> sLit "%l2"; 19 -> sLit "%l3";
184 20 -> sLit "%l4"; 21 -> sLit "%l5";
185 22 -> sLit "%l6"; 23 -> sLit "%l7";
186 24 -> sLit "%i0"; 25 -> sLit "%i1";
187 26 -> sLit "%i2"; 27 -> sLit "%i3";
188 28 -> sLit "%i4"; 29 -> sLit "%i5";
189 30 -> sLit "%i6"; 31 -> sLit "%i7";
190 32 -> sLit "%f0"; 33 -> sLit "%f1";
191 34 -> sLit "%f2"; 35 -> sLit "%f3";
192 36 -> sLit "%f4"; 37 -> sLit "%f5";
193 38 -> sLit "%f6"; 39 -> sLit "%f7";
194 40 -> sLit "%f8"; 41 -> sLit "%f9";
195 42 -> sLit "%f10"; 43 -> sLit "%f11";
196 44 -> sLit "%f12"; 45 -> sLit "%f13";
197 46 -> sLit "%f14"; 47 -> sLit "%f15";
198 48 -> sLit "%f16"; 49 -> sLit "%f17";
199 50 -> sLit "%f18"; 51 -> sLit "%f19";
200 52 -> sLit "%f20"; 53 -> sLit "%f21";
201 54 -> sLit "%f22"; 55 -> sLit "%f23";
202 56 -> sLit "%f24"; 57 -> sLit "%f25";
203 58 -> sLit "%f26"; 59 -> sLit "%f27";
204 60 -> sLit "%f28"; 61 -> sLit "%f29";
205 62 -> sLit "%f30"; 63 -> sLit "%f31";
206 _ -> sLit "very naughty sparc register" })
209 -- | Pretty print a size for an instruction suffix.
210 pprSize :: Size -> Doc
220 _ -> panic "SPARC.Ppr.pprSize: no match")
223 -- | Pretty print a size for an instruction suffix.
224 -- eg LD is 32bit on sparc, but LDD is 64 bit.
225 pprStSize :: Size -> Doc
235 _ -> panic "SPARC.Ppr.pprSize: no match")
238 -- | Pretty print a condition code.
239 pprCond :: Cond -> Doc
261 -- | Pretty print an address mode.
262 pprAddr :: AddrMode -> Doc
265 AddrRegReg r1 (RegReal (RealRegSingle 0))
269 -> hcat [ pprReg r1, char '+', pprReg r2 ]
271 AddrRegImm r1 (ImmInt i)
272 | i == 0 -> pprReg r1
273 | not (fits13Bits i) -> largeOffsetError i
274 | otherwise -> hcat [ pprReg r1, pp_sign, int i ]
276 pp_sign = if i > 0 then char '+' else empty
278 AddrRegImm r1 (ImmInteger i)
279 | i == 0 -> pprReg r1
280 | not (fits13Bits i) -> largeOffsetError i
281 | otherwise -> hcat [ pprReg r1, pp_sign, integer i ]
283 pp_sign = if i > 0 then char '+' else empty
286 -> hcat [ pprReg r1, char '+', pprImm imm ]
289 -- | Pretty print an immediate value.
294 ImmInteger i -> integer i
295 ImmCLbl l -> pprCLabel_asm l
296 ImmIndex l i -> pprCLabel_asm l <> char '+' <> int i
300 -> pprImm a <> char '+' <> pprImm b
303 -> pprImm a <> char '-' <> lparen <> pprImm b <> rparen
306 -> hcat [ text "%lo(", pprImm i, rparen ]
309 -> hcat [ text "%hi(", pprImm i, rparen ]
311 -- these should have been converted to bytes and placed
312 -- in the data section.
313 ImmFloat _ -> ptext (sLit "naughty float immediate")
314 ImmDouble _ -> ptext (sLit "naughty double immediate")
317 -- | Pretty print a section \/ segment header.
318 -- On SPARC all the data sections must be at least 8 byte aligned
319 -- incase we store doubles in them.
321 pprSectionHeader :: Section -> Doc
324 Text -> ptext (sLit ".text\n\t.align 4")
325 Data -> ptext (sLit ".data\n\t.align 8")
326 ReadOnlyData -> ptext (sLit ".text\n\t.align 8")
327 RelocatableReadOnlyData -> ptext (sLit ".text\n\t.align 8")
328 UninitialisedData -> ptext (sLit ".bss\n\t.align 8")
329 ReadOnlyData16 -> ptext (sLit ".data\n\t.align 16")
330 OtherSection _ -> panic "PprMach.pprSectionHeader: unknown section"
333 -- | Pretty print a data item.
334 pprDataItem :: CmmLit -> Doc
336 = vcat (ppr_item (cmmTypeSize $ cmmLitType lit) lit)
340 ppr_item II8 _ = [ptext (sLit "\t.byte\t") <> pprImm imm]
341 ppr_item II32 _ = [ptext (sLit "\t.long\t") <> pprImm imm]
343 ppr_item FF32 (CmmFloat r _)
344 = let bs = floatToBytes (fromRational r)
345 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
347 ppr_item FF64 (CmmFloat r _)
348 = let bs = doubleToBytes (fromRational r)
349 in map (\b -> ptext (sLit "\t.byte\t") <> pprImm (ImmInt b)) bs
351 ppr_item II16 _ = [ptext (sLit "\t.short\t") <> pprImm imm]
352 ppr_item II64 _ = [ptext (sLit "\t.quad\t") <> pprImm imm]
353 ppr_item _ _ = panic "SPARC.Ppr.pprDataItem: no match"
356 -- | Pretty print an instruction.
357 pprInstr :: Instr -> Doc
364 = pprInstr (COMMENT (mkFastString ("\tdelta = " ++ show d)))
366 -- Newblocks and LData should have been slurped out before producing the .s file.
367 pprInstr (NEWBLOCK _)
368 = panic "X86.Ppr.pprInstr: NEWBLOCK"
371 = panic "PprMach.pprInstr: LDATA"
373 -- 64 bit FP loads are expanded into individual instructions in CodeGen.Expand
374 pprInstr (LD FF64 _ reg)
375 | RegReal (RealRegSingle{}) <- reg
376 = panic "SPARC.Ppr: not emitting potentially misaligned LD FF64 instr"
378 pprInstr (LD size addr reg)
389 -- 64 bit FP storees are expanded into individual instructions in CodeGen.Expand
390 pprInstr (ST FF64 reg _)
391 | RegReal (RealRegSingle{}) <- reg
392 = panic "SPARC.Ppr: not emitting potentially misaligned ST FF64 instr"
394 -- no distinction is made between signed and unsigned bytes on stores for the
395 -- Sparc opcodes (at least I cannot see any, and gas is nagging me --SOF),
396 -- so we call a special-purpose pprSize for ST..
397 pprInstr (ST size reg addr)
409 pprInstr (ADD x cc reg1 ri reg2)
410 | not x && not cc && riZero ri
411 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
414 = pprRegRIReg (if x then sLit "addx" else sLit "add") cc reg1 ri reg2
417 pprInstr (SUB x cc reg1 ri reg2)
418 | not x && cc && reg2 == g0
419 = hcat [ ptext (sLit "\tcmp\t"), pprReg reg1, comma, pprRI ri ]
421 | not x && not cc && riZero ri
422 = hcat [ ptext (sLit "\tmov\t"), pprReg reg1, comma, pprReg reg2 ]
425 = pprRegRIReg (if x then sLit "subx" else sLit "sub") cc reg1 ri reg2
427 pprInstr (AND b reg1 ri reg2) = pprRegRIReg (sLit "and") b reg1 ri reg2
429 pprInstr (ANDN b reg1 ri reg2) = pprRegRIReg (sLit "andn") b reg1 ri reg2
431 pprInstr (OR b reg1 ri reg2)
432 | not b && reg1 == g0
433 = let doit = hcat [ ptext (sLit "\tmov\t"), pprRI ri, comma, pprReg reg2 ]
435 RIReg rrr | rrr == reg2 -> empty
439 = pprRegRIReg (sLit "or") b reg1 ri reg2
441 pprInstr (ORN b reg1 ri reg2) = pprRegRIReg (sLit "orn") b reg1 ri reg2
443 pprInstr (XOR b reg1 ri reg2) = pprRegRIReg (sLit "xor") b reg1 ri reg2
444 pprInstr (XNOR b reg1 ri reg2) = pprRegRIReg (sLit "xnor") b reg1 ri reg2
446 pprInstr (SLL reg1 ri reg2) = pprRegRIReg (sLit "sll") False reg1 ri reg2
447 pprInstr (SRL reg1 ri reg2) = pprRegRIReg (sLit "srl") False reg1 ri reg2
448 pprInstr (SRA reg1 ri reg2) = pprRegRIReg (sLit "sra") False reg1 ri reg2
450 pprInstr (RDY rd) = ptext (sLit "\trd\t%y,") <> pprReg rd
451 pprInstr (WRY reg1 reg2)
452 = ptext (sLit "\twr\t")
459 pprInstr (SMUL b reg1 ri reg2) = pprRegRIReg (sLit "smul") b reg1 ri reg2
460 pprInstr (UMUL b reg1 ri reg2) = pprRegRIReg (sLit "umul") b reg1 ri reg2
461 pprInstr (SDIV b reg1 ri reg2) = pprRegRIReg (sLit "sdiv") b reg1 ri reg2
462 pprInstr (UDIV b reg1 ri reg2) = pprRegRIReg (sLit "udiv") b reg1 ri reg2
464 pprInstr (SETHI imm reg)
466 ptext (sLit "\tsethi\t"),
473 = ptext (sLit "\tnop")
475 pprInstr (FABS size reg1 reg2)
476 = pprSizeRegReg (sLit "fabs") size reg1 reg2
478 pprInstr (FADD size reg1 reg2 reg3)
479 = pprSizeRegRegReg (sLit "fadd") size reg1 reg2 reg3
481 pprInstr (FCMP e size reg1 reg2)
482 = pprSizeRegReg (if e then sLit "fcmpe" else sLit "fcmp") size reg1 reg2
484 pprInstr (FDIV size reg1 reg2 reg3)
485 = pprSizeRegRegReg (sLit "fdiv") size reg1 reg2 reg3
487 pprInstr (FMOV size reg1 reg2)
488 = pprSizeRegReg (sLit "fmov") size reg1 reg2
490 pprInstr (FMUL size reg1 reg2 reg3)
491 = pprSizeRegRegReg (sLit "fmul") size reg1 reg2 reg3
493 pprInstr (FNEG size reg1 reg2)
494 = pprSizeRegReg (sLit "fneg") size reg1 reg2
496 pprInstr (FSQRT size reg1 reg2)
497 = pprSizeRegReg (sLit "fsqrt") size reg1 reg2
499 pprInstr (FSUB size reg1 reg2 reg3)
500 = pprSizeRegRegReg (sLit "fsub") size reg1 reg2 reg3
502 pprInstr (FxTOy size1 size2 reg1 reg2)
510 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
517 _ -> panic "SPARC.Ppr.pprInstr.FxToY: no match"),
518 pprReg reg1, comma, pprReg reg2
522 pprInstr (BI cond b blockid)
524 ptext (sLit "\tb"), pprCond cond,
525 if b then pp_comma_a else empty,
527 pprCLabel_asm (mkAsmTempLabel (getUnique blockid))
530 pprInstr (BF cond b blockid)
532 ptext (sLit "\tfb"), pprCond cond,
533 if b then pp_comma_a else empty,
535 pprCLabel_asm (mkAsmTempLabel (getUnique blockid))
538 pprInstr (JMP addr) = (<>) (ptext (sLit "\tjmp\t")) (pprAddr addr)
539 pprInstr (JMP_TBL op _ _) = pprInstr (JMP op)
541 pprInstr (CALL (Left imm) n _)
542 = hcat [ ptext (sLit "\tcall\t"), pprImm imm, comma, int n ]
544 pprInstr (CALL (Right reg) n _)
545 = hcat [ ptext (sLit "\tcall\t"), pprReg reg, comma, int n ]
548 -- | Pretty print a RI
550 pprRI (RIReg r) = pprReg r
551 pprRI (RIImm r) = pprImm r
554 -- | Pretty print a two reg instruction.
555 pprSizeRegReg :: LitString -> Size -> Reg -> Reg -> Doc
556 pprSizeRegReg name size reg1 reg2
561 FF32 -> ptext (sLit "s\t")
562 FF64 -> ptext (sLit "d\t")
563 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
571 -- | Pretty print a three reg instruction.
572 pprSizeRegRegReg :: LitString -> Size -> Reg -> Reg -> Reg -> Doc
573 pprSizeRegRegReg name size reg1 reg2 reg3
578 FF32 -> ptext (sLit "s\t")
579 FF64 -> ptext (sLit "d\t")
580 _ -> panic "SPARC.Ppr.pprSizeRegReg: no match"),
589 -- | Pretty print an instruction of two regs and a ri.
590 pprRegRIReg :: LitString -> Bool -> Reg -> RI -> Reg -> Doc
591 pprRegRIReg name b reg1 ri reg2
595 if b then ptext (sLit "cc\t") else char '\t',
604 pprRIReg :: LitString -> Bool -> RI -> Reg -> Doc
605 pprRIReg name b ri reg1
609 if b then ptext (sLit "cc\t") else char '\t',
617 pp_ld_lbracket :: Doc
618 pp_ld_lbracket = ptext (sLit "\tld\t[")
621 pp_rbracket_comma :: Doc
622 pp_rbracket_comma = text "],"
625 pp_comma_lbracket :: Doc
626 pp_comma_lbracket = text ",["
630 pp_comma_a = text ",a"