21 EABase(..), EAIndex(..), addrModeRegs,
23 eax, ebx, ecx, edx, esi, edi, ebp, esp,
24 fake0, fake1, fake2, fake3, fake4, fake5,
26 rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp,
27 r8, r9, r10, r11, r12, r13, r14, r15,
28 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
29 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
39 get_GlobalReg_reg_or_addr,
45 #include "nativeGen/NCG.h"
46 #include "HsVersions.h"
49 # define STOLEN_X86_REGS 4
50 -- HACK: go for the max
53 #include "../includes/MachRegs.h"
58 import CgUtils ( get_GlobalReg_addr )
61 import CLabel ( CLabel )
63 import Outputable ( panic )
64 import qualified Outputable
67 #if defined(i386_TARGET_ARCH) || defined(x86_64_TARGET_ARCH)
69 import Outputable (ppr, pprPanic)
73 -- -----------------------------------------------------------------------------
78 | ImmInteger Integer -- Sigh.
79 | ImmCLbl CLabel -- AbstractC Label (with baggage)
80 | ImmLit Doc -- Simple string
84 | ImmConstantSum Imm Imm
85 | ImmConstantDiff Imm Imm
88 strImmLit :: String -> Imm
89 strImmLit s = ImmLit (text s)
92 litToImm :: CmmLit -> Imm
93 litToImm (CmmInt i w) = ImmInteger (narrowS w i)
94 -- narrow to the width: a CmmInt might be out of
95 -- range, but we assume that ImmInteger only contains
96 -- in-range values. A signed value should be fine here.
97 litToImm (CmmFloat f W32) = ImmFloat f
98 litToImm (CmmFloat f W64) = ImmDouble f
99 litToImm (CmmLabel l) = ImmCLbl l
100 litToImm (CmmLabelOff l off) = ImmIndex l off
101 litToImm (CmmLabelDiffOff l1 l2 off)
103 (ImmConstantDiff (ImmCLbl l1) (ImmCLbl l2))
105 litToImm (CmmBlock id) = ImmCLbl (infoTblLbl id)
106 litToImm _ = panic "X86.Regs.litToImm: no match"
108 -- addressing modes ------------------------------------------------------------
111 = AddrBaseIndex EABase EAIndex Displacement
114 data EABase = EABaseNone | EABaseReg Reg | EABaseRip
115 data EAIndex = EAIndexNone | EAIndex Reg Int
116 type Displacement = Imm
119 addrOffset :: AddrMode -> Int -> Maybe AddrMode
122 ImmAddr i off0 -> Just (ImmAddr i (off0 + off))
124 AddrBaseIndex r i (ImmInt n) -> Just (AddrBaseIndex r i (ImmInt (n + off)))
125 AddrBaseIndex r i (ImmInteger n)
126 -> Just (AddrBaseIndex r i (ImmInt (fromInteger (n + toInteger off))))
128 AddrBaseIndex r i (ImmCLbl lbl)
129 -> Just (AddrBaseIndex r i (ImmIndex lbl off))
131 AddrBaseIndex r i (ImmIndex lbl ix)
132 -> Just (AddrBaseIndex r i (ImmIndex lbl (ix+off)))
134 _ -> Nothing -- in theory, shouldn't happen
137 addrModeRegs :: AddrMode -> [Reg]
138 addrModeRegs (AddrBaseIndex b i _) = b_regs ++ i_regs
140 b_regs = case b of { EABaseReg r -> [r]; _ -> [] }
141 i_regs = case i of { EAIndex r _ -> [r]; _ -> [] }
145 -- registers -------------------------------------------------------------------
147 -- @spRel@ gives us a stack relative addressing mode for volatile
148 -- temporaries and for excess call arguments. @fpRel@, where
149 -- applicable, is the same but for the frame pointer.
152 spRel :: Int -- ^ desired stack offset in words, positive or negative
156 spRel n = AddrBaseIndex (EABaseReg esp) EAIndexNone (ImmInt (n * wORD_SIZE))
158 #elif x86_64_TARGET_ARCH
159 spRel n = AddrBaseIndex (EABaseReg rsp) EAIndexNone (ImmInt (n * wORD_SIZE))
162 spRel _ = panic "X86.Regs.spRel: not defined for this architecture"
167 -- argRegs is the set of regs which are read for an n-argument call to C.
168 -- For archs which pass all args on the stack (x86), is empty.
169 -- Sparc passes up to the first 6 args in regs.
170 -- Dunno about Alpha.
171 argRegs :: RegNo -> [Reg]
172 argRegs _ = panic "MachRegs.argRegs(x86): should not be used!"
178 -- | The complete set of machine registers.
179 allMachRegNos :: [RegNo]
182 allMachRegNos = [0..13]
184 #elif x86_64_TARGET_ARCH
185 allMachRegNos = [0..31]
188 allMachRegNos = panic "X86.Regs.callClobberedRegs: not defined for this architecture"
193 -- | Take the class of a register.
194 {-# INLINE regClass #-}
195 regClass :: Reg -> RegClass
198 -- On x86, we might want to have an 8-bit RegClass, which would
199 -- contain just regs 1-4 (the others don't have 8-bit versions).
200 -- However, we can get away without this at the moment because the
201 -- only allocatable integer regs are also 8-bit compatible (1, 3, 4).
202 regClass (RealReg i) = if i < 8 then RcInteger else RcDouble
203 regClass (VirtualRegI _) = RcInteger
204 regClass (VirtualRegHi _) = RcInteger
205 regClass (VirtualRegD _) = RcDouble
206 regClass (VirtualRegF u) = pprPanic ("regClass(x86):VirtualRegF") (ppr u)
208 #elif x86_64_TARGET_ARCH
209 -- On x86, we might want to have an 8-bit RegClass, which would
210 -- contain just regs 1-4 (the others don't have 8-bit versions).
211 -- However, we can get away without this at the moment because the
212 -- only allocatable integer regs are also 8-bit compatible (1, 3, 4).
213 regClass (RealReg i) = if i < 16 then RcInteger else RcDouble
214 regClass (VirtualRegI _) = RcInteger
215 regClass (VirtualRegHi _) = RcInteger
216 regClass (VirtualRegD _) = RcDouble
217 regClass (VirtualRegF u) = pprPanic "regClass(x86_64):VirtualRegF" (ppr u)
220 regClass _ = panic "X86.Regs.regClass: not defined for this architecture"
225 -- | Get the name of the register with this number.
226 showReg :: RegNo -> String
230 = if n >= 0 && n < 14
232 else "%unknown_x86_real_reg_" ++ show n
236 = ["%eax", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp", "%esp",
237 "%fake0", "%fake1", "%fake2", "%fake3", "%fake4", "%fake5", "%fake6"]
239 #elif x86_64_TARGET_ARCH
241 | n >= 16 = "%xmm" ++ show (n-16)
242 | n >= 8 = "%r" ++ show n
243 | otherwise = regNames !! n
247 = ["%rax", "%rbx", "%rcx", "%rdx", "%rsi", "%rdi", "%rbp", "%rsp" ]
250 showReg _ = panic "X86.Regs.showReg: not defined for this architecture"
257 -- machine specific ------------------------------------------------------------
261 Intel x86 architecture:
262 - All registers except 7 (esp) are available for use.
263 - Only ebx, esi, edi and esp are available across a C call (they are callee-saves).
264 - Registers 0-7 have 16-bit counterparts (ax, bx etc.)
265 - Registers 0-3 have 8 bit counterparts (ah, bh etc.)
266 - Registers 8-13 are fakes; we pretend x86 has 6 conventionally-addressable
267 fp registers, and 3-operand insns for them, and we translate this into
268 real stack-based x86 fp code after register allocation.
270 The fp registers are all Double registers; we don't have any RcFloat class
271 regs. @regClass@ barfs if you give it a VirtualRegF, and mkVReg above should
275 fake0, fake1, fake2, fake3, fake4, fake5,
276 eax, ebx, ecx, edx, esp, ebp, esi, edi :: Reg
296 AMD x86_64 architecture:
297 - Registers 0-16 have 32-bit counterparts (eax, ebx etc.)
298 - Registers 0-7 have 16-bit counterparts (ax, bx etc.)
299 - Registers 0-3 have 8 bit counterparts (ah, bh etc.)
303 rax, rbx, rcx, rdx, rsp, rbp, rsi, rdi,
304 r8, r9, r10, r11, r12, r13, r14, r15,
305 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
306 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15 :: Reg
341 allFPArgRegs :: [Reg]
342 allFPArgRegs = map RealReg [16 .. 23]
344 ripRel :: Displacement -> AddrMode
345 ripRel imm = AddrBaseIndex EABaseRip EAIndexNone imm
348 -- so we can re-use some x86 code:
361 xmm n = RealReg (16+n)
366 -- horror show -----------------------------------------------------------------
367 freeReg :: RegNo -> FastBool
368 globalRegMaybe :: GlobalReg -> Maybe Reg
370 callClobberedRegs :: [Reg]
372 #if defined(i386_TARGET_ARCH) || defined(x86_64_TARGET_ARCH)
391 #if x86_64_TARGET_ARCH
429 freeReg esp = fastBool False -- %esp is the C stack pointer
432 #if x86_64_TARGET_ARCH
433 freeReg rsp = fastBool False -- %rsp is the C stack pointer
437 freeReg REG_Base = fastBool False
440 freeReg REG_R1 = fastBool False
443 freeReg REG_R2 = fastBool False
446 freeReg REG_R3 = fastBool False
449 freeReg REG_R4 = fastBool False
452 freeReg REG_R5 = fastBool False
455 freeReg REG_R6 = fastBool False
458 freeReg REG_R7 = fastBool False
461 freeReg REG_R8 = fastBool False
464 freeReg REG_F1 = fastBool False
467 freeReg REG_F2 = fastBool False
470 freeReg REG_F3 = fastBool False
473 freeReg REG_F4 = fastBool False
476 freeReg REG_D1 = fastBool False
479 freeReg REG_D2 = fastBool False
482 freeReg REG_Sp = fastBool False
485 freeReg REG_Su = fastBool False
488 freeReg REG_SpLim = fastBool False
491 freeReg REG_Hp = fastBool False
494 freeReg REG_HpLim = fastBool False
496 freeReg _ = fastBool True
499 -- | Returns 'Nothing' if this global register is not stored
500 -- in a real machine register, otherwise returns @'Just' reg@, where
501 -- reg is the machine register it is stored in.
504 globalRegMaybe BaseReg = Just (RealReg REG_Base)
507 globalRegMaybe (VanillaReg 1 _) = Just (RealReg REG_R1)
510 globalRegMaybe (VanillaReg 2 _) = Just (RealReg REG_R2)
513 globalRegMaybe (VanillaReg 3 _) = Just (RealReg REG_R3)
516 globalRegMaybe (VanillaReg 4 _) = Just (RealReg REG_R4)
519 globalRegMaybe (VanillaReg 5 _) = Just (RealReg REG_R5)
522 globalRegMaybe (VanillaReg 6 _) = Just (RealReg REG_R6)
525 globalRegMaybe (VanillaReg 7 _) = Just (RealReg REG_R7)
528 globalRegMaybe (VanillaReg 8 _) = Just (RealReg REG_R8)
531 globalRegMaybe (VanillaReg 9 _) = Just (RealReg REG_R9)
534 globalRegMaybe (VanillaReg 10 _) = Just (RealReg REG_R10)
537 globalRegMaybe (FloatReg 1) = Just (RealReg REG_F1)
540 globalRegMaybe (FloatReg 2) = Just (RealReg REG_F2)
543 globalRegMaybe (FloatReg 3) = Just (RealReg REG_F3)
546 globalRegMaybe (FloatReg 4) = Just (RealReg REG_F4)
549 globalRegMaybe (DoubleReg 1) = Just (RealReg REG_D1)
552 globalRegMaybe (DoubleReg 2) = Just (RealReg REG_D2)
555 globalRegMaybe Sp = Just (RealReg REG_Sp)
558 globalRegMaybe (LongReg 1) = Just (RealReg REG_Lng1)
561 globalRegMaybe (LongReg 2) = Just (RealReg REG_Lng2)
564 globalRegMaybe SpLim = Just (RealReg REG_SpLim)
567 globalRegMaybe Hp = Just (RealReg REG_Hp)
570 globalRegMaybe HpLim = Just (RealReg REG_HpLim)
572 #ifdef REG_CurrentTSO
573 globalRegMaybe CurrentTSO = Just (RealReg REG_CurrentTSO)
575 #ifdef REG_CurrentNursery
576 globalRegMaybe CurrentNursery = Just (RealReg REG_CurrentNursery)
578 globalRegMaybe _ = Nothing
583 allArgRegs = panic "X86.Regs.allArgRegs: should not be used!"
585 #elif x86_64_TARGET_ARCH
586 allArgRegs = map RealReg [rdi,rsi,rdx,rcx,r8,r9]
589 allArgRegs = panic "X86.Regs.allArgRegs: not defined for this architecture"
593 -- | these are the regs which we cannot assume stay alive over a C call.
596 -- caller-saves registers
598 = map RealReg [eax,ecx,edx,fake0,fake1,fake2,fake3,fake4,fake5]
600 #elif x86_64_TARGET_ARCH
601 -- all xmm regs are caller-saves
602 -- caller-saves registers
604 = map RealReg ([rax,rcx,rdx,rsi,rdi,r8,r9,r10,r11] ++ [16..31])
608 = panic "X86.Regs.callClobberedRegs: not defined for this architecture"
611 #else /* i386_TARGET_ARCH || x86_64_TARGET_ARCH */
616 globalRegMaybe _ = panic "X86.Regs.globalRegMaybe: not defined"
618 allArgRegs = panic "X86.Regs.globalRegMaybe: not defined"
619 callClobberedRegs = panic "X86.Regs.globalRegMaybe: not defined"
624 -- We map STG registers onto appropriate CmmExprs. Either they map
625 -- to real machine registers or stored as offsets from BaseReg. Given
626 -- a GlobalReg, get_GlobalReg_reg_or_addr produces either the real
627 -- register it is in, on this platform, or a CmmExpr denoting the
628 -- address in the register table holding it.
629 -- (See also get_GlobalReg_addr in CgUtils.)
631 get_GlobalReg_reg_or_addr :: GlobalReg -> Either Reg CmmExpr
632 get_GlobalReg_reg_or_addr mid
633 = case globalRegMaybe mid of
635 Nothing -> Right (get_GlobalReg_addr mid)
638 -- allocatableRegs is allMachRegNos with the fixed-use regs removed.
639 -- i.e., these are the regs for which we are prepared to allow the
640 -- register allocator to attempt to map VRegs to.
641 allocatableRegs :: [RegNo]
643 = let isFree i = isFastTrue (freeReg i)
644 in filter isFree allMachRegNos