1 \documentclass[10pt,oneside]{book}
7 \renewcommand{\ttdefault}{cmtt}
8 \title{The FleetTwo Architecture Manual}
25 \section*{Data Formats}
27 \subsection*{Packet Destination Address (12 bits)}
29 These bits appear physically within the switch fabric, and have
30 ``address bit timing.'' The {\tt T} bit is the ``tokenhood'' bit; if
31 set, this packet represents a token and it does not cause the switch
32 fabric data latches to fire.
36 \bitheader[b]{37,47,48}\\
38 \bitbox{11}{Destination Address}
43 \subsection*{Data Word In Memory (37 bits)}
45 A word of memory is 37 bits wide. For convenience, we assume that the
46 memory word width is also the width of a pointer as well as the width
47 of all on-chip data item registers.
53 \bitbox{37}{Data Word}
57 \subsection*{Data Packet In Flight (49 bits)}
59 A {\it data packet} is a data item in the switch fabric, on its way to
64 \bitheader[b]{0,36,37,47,48}\\
66 \bitbox{11}{Destination Address}
67 \bitbox{37}{Data Word}
71 \subsection*{Instruction In Memory (37 bits)}
73 An instruction must be no wider than a memory word. The next section
74 explains the bits in greater detail.
78 \bitheader[b]{0,10,11,17,18-26,36}\\
80 \bitbox{11}{Instruction Register Address}
90 \bitbox{11}{Data/Token Destination}
94 \subsection*{Instruction Packet In Flight (49 bits)}
96 A {\it instruction packet} is an instruction in the instruction horn
97 (which may or may not be the same thing as the data horn), on its way
98 to some instruction register (Valve).
101 \begin{bytefield}{49}
102 \bitheader[b]{0,10,11,17,18-25,37,47,48}\\
104 \bitbox{11}{Instruction Register Address}
115 \bitbox{11}{Data/Token Destination}
122 \section*{Instruction Formats}
124 Instructions can be grouped into two categories: {\it killing}
125 instructions, which are acted upon as soon as they leave the
126 instruction horn, and {\it executing} instructions, which pass through
127 the instruction queue before being acted upon.
129 Blank fields below are reserved for future use and must be set to
132 Note that the arbiter is requested whenever {\it any of the first
133 three bits is {\tt 1}}. If the arbiter is not requested,
137 \setlength{\bitwidth}{5mm}
139 \subsection*{Killing Instructions}
141 Kill (kill anything other than a Clog)
144 \begin{bytefield}{26}
145 \bitheader[b]{0,6,7,20-25}\\
158 \begin{bytefield}{26}
159 \bitheader[b]{0,20-25}\\
168 \subsection*{Executing Instructions}
172 \begin{bytefield}{26}
173 \bitheader[b]{0,20-25}\\
182 Literal (sign extended, implicit {\tt Rq=1})
185 \begin{bytefield}{26}
186 \bitheader[b]{0,6,7,23-25}\\
197 \begin{bytefield}{26}
198 \bitheader[b]{0,6,7,17-25}\\
215 \subsection*{Field Descriptions}
217 \begin{bytefield}{26}
218 \bitheader[b]{0,6,7,16-25}\\
234 \item [\tt Ti] ({\bf Token Input}) wait for a token and accept
235 it\footnote{{\tt Ti}=1,{\tt Di}=1 is invalid on inbox.}
237 \item [\tt Di] ({\bf Data Input}) wait for a datum and accept it.
239 \item [\tt Dc] ({\bf Data Capture}) capture (latch) the accepted
240 datum. This bit is ignored if the incoming packet is
241 a token. \footnote{ Note that {\tt Di}=0,{\tt Dc}=1
242 is meaningless and therefore reserved for other
245 \item [\tt Do] ({\bf Data Output}) emit a datum.
247 \item [\tt To] ({\bf Token Output}) emit a token.\footnote{ {\tt To}=1,{\tt
248 Do}=1 have special meaning on an outbox.}
250 \item [\tt Ig] ({\bf Ignore {\tt To} Until Last Iteration}) ignore
251 the {\tt To} bit unless {\tt Count=0} \footnote{{\tt
252 To}=0,{\tt Ig}=1 is invalid}
254 \item [\tt Rq] ({\bf ReQueue}) if set, instructions having nonzero
255 count are ``Re-Queued'' rather than RePeated. See
256 {\tt Count} for more detail. \footnote{ An
257 instruction {\it in memory} may not have {\tt
258 Rq=1,Count=0} (use {\tt Rq=0,Count=0})}
260 \item [\tt Count] ({\bf Count}) {\it After} executing:
263 discard this instruction
265 if Count < MAX_COUNT {
269 put this instruction back into the instruction fifo
271 execute this instruction again
275 Note how a ``standing'' instruction is encoded as {\tt Count=1111111}
277 \item [\tt Dest] ({\bf Data/Token Destination})
278 Normally, this field is copied into the address portion of any
279 outgoing packet ({\tt Do} on an outbox or {\tt To}).
281 However, in the special case of an outbox, if {\tt Do=1,To=1}, then
282 the {\it most significant} {\tt 11} bits of the value in the {\it
283 data register} are used as a destination address instead. \footnote{This
284 functionality eliminates the need for any sort of ``{\tt Execute}''
285 ship, and lets a {\tt Fifo} ship act as an extension of the
286 instruction queue in the pump.}