1 /* ----------------------------------------------------------------------------
3 * (c) The GHC Team, 2005
5 * Macros for THREADED_RTS support
7 * -------------------------------------------------------------------------- */
12 /* THREADED_RTS is currently not compatible with the following options:
14 * PROFILING (but only 1 CPU supported)
16 * Unregisterised builds are ok, but only 1 CPU supported.
19 #if defined(THREADED_RTS)
21 #if defined(TICKY_TICKY)
22 #error Build options incompatible with THREADED_RTS.
25 /* ----------------------------------------------------------------------------
27 ------------------------------------------------------------------------- */
30 * The atomic exchange operation: xchg(p,w) exchanges the value
31 * pointed to by p with the value w, returning the old value.
33 * Used for locking closures during updates (see lockClosure() below)
34 * and the MVar primops.
36 INLINE_HEADER StgWord xchg(StgPtr p, StgWord w);
39 * Compare-and-swap. Atomically does this:
43 * if (r == o) { *p = n };
47 INLINE_HEADER StgWord cas(StgVolatilePtr p, StgWord o, StgWord n);
50 * Prevents write operations from moving across this call in either
53 INLINE_HEADER void write_barrier(void);
55 /* ----------------------------------------------------------------------------
57 ------------------------------------------------------------------------- */
59 * NB: the xchg instruction is implicitly locked, so we do not need
63 xchg(StgPtr p, StgWord w)
66 #if i386_HOST_ARCH || x86_64_HOST_ARCH
68 __asm__ __volatile__ (
70 :"+r" (result), "+m" (*p)
71 : /* no input-only operands */
73 #elif powerpc_HOST_ARCH
74 __asm__ __volatile__ (
75 "1: lwarx %0, 0, %2\n"
83 __asm__ __volatile__ (
85 : "+r" (result), "+m" (*p)
86 : /* no input-only operands */
88 #elif !defined(WITHSMP)
92 #error xchg() unimplemented on this architecture
98 * CMPXCHG - the single-word atomic compare-and-exchange instruction. Used
99 * in the STM implementation.
101 INLINE_HEADER StgWord
102 cas(StgVolatilePtr p, StgWord o, StgWord n)
104 #if i386_HOST_ARCH || x86_64_HOST_ARCH
105 __asm__ __volatile__ (
106 "lock\ncmpxchg %3,%1"
107 :"=a"(o), "=m" (*(volatile unsigned int *)p)
110 #elif powerpc_HOST_ARCH
112 __asm__ __volatile__ (
113 "1: lwarx %0, 0, %3\n"
116 " stwcx. %2, 0, %3\n"
120 :"r" (o), "r" (n), "r" (p)
124 #elif sparc_HOST_ARCH
125 __asm__ __volatile__ (
132 #elif !defined(WITHSMP)
140 #error cas() unimplemented on this architecture
145 * Write barrier - ensure that all preceding writes have happened
146 * before all following writes.
148 * We need to tell both the compiler AND the CPU about the barrier.
149 * This is a brute force solution; better results might be obtained by
150 * using volatile type declarations to get fine-grained ordering
151 * control in C, and optionally a memory barrier instruction on CPUs
152 * that require it (not x86 or x86_64).
155 write_barrier(void) {
156 #if i386_HOST_ARCH || x86_64_HOST_ARCH
157 __asm__ __volatile__ ("" : : : "memory");
158 #elif powerpc_HOST_ARCH
159 __asm__ __volatile__ ("lwsync" : : : "memory");
160 #elif sparc_HOST_ARCH
161 /* Sparc in TSO mode does not require write/write barriers. */
162 __asm__ __volatile__ ("" : : : "memory");
163 #elif !defined(WITHSMP)
166 #error memory barriers unimplemented on this architecture
170 /* -----------------------------------------------------------------------------
171 * Locking/unlocking closures
173 * This is used primarily in the implementation of MVars.
174 * -------------------------------------------------------------------------- */
176 #define SPIN_COUNT 4000
178 INLINE_HEADER StgInfoTable *
179 lockClosure(StgClosure *p)
185 info = xchg((P_)(void *)&p->header.info, (W_)&stg_WHITEHOLE_info);
186 if (info != (W_)&stg_WHITEHOLE_info) return (StgInfoTable *)info;
187 } while (++i < SPIN_COUNT);
193 unlockClosure(StgClosure *p, StgInfoTable *info)
195 // This is a strictly ordered write, so we need a write_barrier():
197 p->header.info = info;
200 /* -----------------------------------------------------------------------------
203 * These are simple spin-only locks as opposed to Mutexes which
204 * probably spin for a while before blocking in the kernel. We use
205 * these when we are sure that all our threads are actively running on
206 * a CPU, eg. in the GC.
208 * TODO: measure whether we really need these, or whether Mutexes
209 * would do (and be a bit safer if a CPU becomes loaded).
210 * -------------------------------------------------------------------------- */
213 typedef struct StgSync_
216 StgWord64 spin; // DEBUG version counts how much it spins
219 typedef StgWord StgSync;
222 typedef lnat StgSyncCount;
227 // Debug versions of spin locks maintain a spin count
230 // To use the debug veriosn of the spin locks, a debug version of the program
231 // can be run under a deugger with a break point on stat_exit. At exit time
232 // of the program one can examine the state the spin count counts of various
233 // spin locks to check for contention.
236 INLINE_HEADER void ACQUIRE_SPIN_LOCK(StgSync * p)
241 r = cas((StgVolatilePtr)&(p->lock), 1, 0);
247 INLINE_HEADER void RELEASE_SPIN_LOCK(StgSync * p)
253 // initialise spin lock
254 INLINE_HEADER void initSpinLock(StgSync * p)
264 INLINE_HEADER void ACQUIRE_SPIN_LOCK(StgSync * p)
268 r = cas((StgVolatilePtr)p, 1, 0);
273 INLINE_HEADER void RELEASE_SPIN_LOCK(StgSync * p)
280 INLINE_HEADER void initSpinLock(StgSync * p)
288 /* ---------------------------------------------------------------------- */
289 #else /* !THREADED_RTS */
291 #define write_barrier() /* nothing */
293 INLINE_HEADER StgWord
294 xchg(StgPtr p, StgWord w)
301 INLINE_HEADER StgInfoTable *
302 lockClosure(StgClosure *p)
303 { return (StgInfoTable *)p->header.info; }
306 unlockClosure(StgClosure *p STG_UNUSED, StgInfoTable *info STG_UNUSED)
309 // Using macros here means we don't have to ensure the argument is in scope
310 #define ACQUIRE_SPIN_LOCK(p) /* nothing */
311 #define RELEASE_SPIN_LOCK(p) /* nothing */
313 INLINE_HEADER void initSpinLock(void * p STG_UNUSED)
316 #endif /* !THREADED_RTS */
318 // Handy specialised versions of lockClosure()/unlockClosure()
319 INLINE_HEADER void lockTSO(StgTSO *tso)
320 { lockClosure((StgClosure *)tso); }
322 INLINE_HEADER void unlockTSO(StgTSO *tso)
323 { unlockClosure((StgClosure*)tso, (StgInfoTable*)&stg_TSO_info); }