3 == Ports ===========================================================
9 == Constants ========================================================
10 == TeX ==============================================================
11 == Fleeterpreter ====================================================
12 public void service() {
14 if (in.dataReadyForShip() && op.dataReadyForShip()) {
15 int data = in.removeDataForShip();
16 int opcode = in.removeDataForShip();
18 case 0: out.addDataFromShip(-1 * data); // NEG
20 case 1: out.addDataFromShip(data+1); // INC
22 case 2: out.addDataFromShip(data-1); // DEC
24 case 3: out.addDataFromShip(Math.abs(data)); // ABS
26 default: out.addDataFromShip(0);
33 == ArchSim ==============================================================
34 == FPGA ==============================================================
40 out_r_, out_a, out_d_);
43 `input(a_r, a_a, a_a_, [(`DATAWIDTH-1):0], a_d)
44 `input(op_r, op_a, op_a_, [(`DATAWIDTH-1):0], op_d)
45 `output(out_r, out_r_, out_a, [(`DATAWIDTH-1):0], out_d_)
46 `defreg(out_d_, [(`DATAWIDTH-1):0], out_d)
49 reg [(`DATAWIDTH-1):0] reg_a;
51 reg [(`DATAWIDTH-1):0] reg_op;
53 always @(posedge clk) begin
55 `onread(a_r, a_a) have_a = 1; reg_a = a_d; end
58 `onread(op_r, op_a) have_op = 1; reg_op = op_d; end
61 if (have_a && have_op) begin
66 3: out_d = (reg_a<0) ? (-reg_a) : reg_a;
69 `onwrite(out_r, out_a)
79 == Contributors =========================================================
80 Adam Megacz <megacz@cs.berkeley.edu>