## Fleeterpreter ##############################################################################
cp = -cp fleet.jar:lib/RXTXcomm.jar
java = java -Xmx500m
run: fleet.jar; $(java) $(cp) $(interpreter_class)
ifeq ($(shell uname -o 2>/dev/null),Cygwin)
ps=\;
else
ps=:
endif
java_files = $(shell find src -name \*.java)
ship_files = $(shell find ships -name \*.ship)
fleet.jar: $(java_files) $(ship_files) src/edu/berkeley/fleet/assembler/fleet.g
mkdir -p build/class/edu/berkeley/fleet/assembler/
cp src/edu/berkeley/fleet/assembler/fleet.g build/class/edu/berkeley/fleet/assembler/
javac -classpath lib/com.sun.async.test.jar:lib/ibex.jar:lib/RXTXcomm.jar:lib/edu.berkeley.sbp.jar -d build/class/ $(shell find src -name \*.java)
cd build/class/; jar xf ../../lib/edu.berkeley.sbp.jar
cd build/class/; jar xf ../../lib/ibex.jar
for A in `find ships -name \*.ship`;\
do java -cp fleet.jar:build/class edu.berkeley.fleet.Main expand $$A;\
done
javac -classpath lib/com.sun.async.test.jar:lib/ibex.jar:lib/RXTXcomm.jar:build/class${ps}lib/edu.berkeley.sbp.jar -d build/class/ `find build/java -name \*.java`
echo 'Main-Class: edu.berkeley.fleet.Main' > build/class/manifest
jar cmf build/class/manifest $@ ships -C build/class .
## Fpga ####################################################################################
# 32Gb ram, 4-core. small-config:1019s large-config:2530s
host = intel2950-5.eecs.berkeley.edu
# 128Gb ram, 2x4-core. small-config:1189s large-config:3065s
#host = amdr905-1.eecs.berkeley.edu
remote_ise = /tools/xilinx/10.1/ISE
remote_edk = /tools/xilinx/10.1/EDK
#remote_ise = /tools/xilinx/ISE9.1i_lin
#remote_edk = /tools/xilinx/EDK9.1i
#remote_dir = /vol/hitz/home/megacz/fleet/
#remote_dir = /tmp/megacz/fleet/
remote_dir = /scratch/megacz/fleet/
#remote_ise = /scratch/megacz/xilinx/10.1/ISE
#remote_edk = /scratch/megacz/xilinx/10.1/EDK
#host = mm2.millennium.berkeley.edu
#remote_ise = /scratch/megacz/xilinx/ise/
#remote_edk = /scratch/megacz/xilinx/edk/
#remote_dir = /scratch/megacz/fleet/
xilinx = cd build/fpga;
xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
xilinx += PATH=$$PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
#xilinx += XST_VERSION=9.2i
xilinx += XILINX=$(remote_ise)
xilinx += XIL_XST_HIDEMESSAGES=hdl_and_low_levels
xilinx += XIL_PAR_DESIGN_CHECK_VERBOSE=1
xilinx += XILINX_EDK=$(remote_edk)
xilinx_ise = $(xilinx) $(remote_ise)/bin/lin/
xilinx_edk = $(xilinx) $(remote_edk)/bin/lin/
# ML50X
speed_grade = 1
part = xc5vlx110t
package = ff1136
board = ml505 # ??
# ML410
#part = xc4vfx60
#package = ff1152
#speed_grade = 11
#board = ml410
# BEE2
#part = xc2vp70
#package = 7ff1704
device = ${part}${package}-${speed_grade}
rsync = rsync --exclude=chips/marina/images -zare ssh --progress --verbose
upload: fleet.jar build/fpga/main.bit
mkdir -p build
chmod +x misc/program.sh
${rsync} ./ root@goliath:fleet/
build/fpga/main.bit: $(java_files) $(ship_files)
make fleet.jar
mkdir -p build/fpga
$(java) $(cp) edu.berkeley.fleet.fpga.Fpga build/fpga/
cp src/edu/berkeley/fleet/fpga/* build/fpga || true
for A in `find ships -name \*.ship`;\
do java -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\
done
ssh ${host} 'mkdir -p ${remote_dir}'
${rsync} --delete ./ ${host}:${remote_dir}
time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_ise} remote_ise=${remote_ise} remote_edk=${remote_edk}'
scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/
scp ${host}:${remote_dir}/build/fpga/main.ace build/fpga/
pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores
intstyle = -intstyle xflow
effort = std
#effort = high
opt_for = area
#opt_for = speed
synth:
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* .
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/ddr2/* .
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/dvi/* .
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/zbt/* .
rm -f build/fpga/main.lso
echo work >> build/fpga/main.lso
rm -f build/fpga/main.prj
cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done >> main.prj
cd build/fpga; for A in *.vhd; do echo vhdl work \""$$A"\"; done >> main.prj
cd build/fpga; touch main.ini
cd build/fpga; mkdir -p tmp
cd build/fpga; mkdir -p xst
rm -rf build/fpga/_ngo
skill xst_original
rm -f build/fpga/main.xst
echo "set -tmpdir ./tmp" >> build/fpga/main.xst
echo "set -xsthdpdir ./xst" >> build/fpga/main.xst
echo "set -xsthdpini main.ini" >> build/fpga/main.xst
echo -n "run" >> build/fpga/main.xst
echo -n " -ifn main.prj" >> build/fpga/main.xst
echo -n " -ifmt mixed" >> build/fpga/main.xst
echo -n " -ofn main" >> build/fpga/main.xst
echo -n " -ofmt NGC" >> build/fpga/main.xst
echo -n " -p ${device}" >> build/fpga/main.xst
echo -n " -top main" >> build/fpga/main.xst
echo -n " -opt_mode ${opt_for}" >> build/fpga/main.xst
echo -n " -opt_level 2" >> build/fpga/main.xst
echo -n " -iuc NO" >> build/fpga/main.xst
echo -n " -lso main.lso" >> build/fpga/main.xst
echo -n " -keep_hierarchy NO" >> build/fpga/main.xst
echo -n " -rtlview Yes" >> build/fpga/main.xst
echo -n " -glob_opt AllClockNets" >> build/fpga/main.xst
echo -n " -read_cores YES" >> build/fpga/main.xst
echo -n " -write_timing_constraints NO" >> build/fpga/main.xst
echo -n " -cross_clock_analysis YES" >> build/fpga/main.xst
echo -n " -hierarchy_separator /" >> build/fpga/main.xst
echo -n " -bus_delimiter <>" >> build/fpga/main.xst
echo -n " -case maintain" >> build/fpga/main.xst
echo -n " -slice_utilization_ratio 100" >> build/fpga/main.xst
echo -n " -verilog2001 YES" >> build/fpga/main.xst
echo -n " -fsm_extract Yes" >> build/fpga/main.xst
echo -n " -fsm_encoding Auto" >> build/fpga/main.xst
echo -n " -safe_implementation No" >> build/fpga/main.xst
echo -n " -fsm_style lut" >> build/fpga/main.xst
echo -n " -ram_extract Yes" >> build/fpga/main.xst
echo -n " -ram_style Auto" >> build/fpga/main.xst
echo -n " -rom_extract Yes" >> build/fpga/main.xst
echo -n " -mux_style Auto" >> build/fpga/main.xst
echo -n " -decoder_extract YES" >> build/fpga/main.xst
echo -n " -priority_extract YES" >> build/fpga/main.xst
echo -n " -shreg_extract YES" >> build/fpga/main.xst
echo -n " -shift_extract YES" >> build/fpga/main.xst
echo -n " -xor_collapse YES" >> build/fpga/main.xst
echo -n " -rom_style Auto" >> build/fpga/main.xst
echo -n " -mux_extract YES" >> build/fpga/main.xst
echo -n " -resource_sharing YES" >> build/fpga/main.xst
echo -n " -mult_style auto" >> build/fpga/main.xst
echo -n " -iobuf YES" >> build/fpga/main.xst
echo -n " -max_fanout 10000" >> build/fpga/main.xst
echo -n " -bufg 1" >> build/fpga/main.xst
echo -n " -register_duplication YES" >> build/fpga/main.xst
echo -n " -register_balancing Yes" >> build/fpga/main.xst
echo -n " -slice_packing Yes" >> build/fpga/main.xst
echo -n " -optimize_primitives Yes" >> build/fpga/main.xst
echo -n " -tristate2logic Yes" >> build/fpga/main.xst
echo -n " -use_clock_enable Yes" >> build/fpga/main.xst
echo -n " -use_sync_set Yes" >> build/fpga/main.xst
echo -n " -use_sync_reset Yes" >> build/fpga/main.xst
echo -n " -iob auto" >> build/fpga/main.xst
echo -n " -equivalent_register_removal YES" >> build/fpga/main.xst
echo -n " -slice_utilization_ratio_maxmargin 5" >> build/fpga/main.xst
echo >> build/fpga/main.xst
rm -f build/fpga/main.ut
echo '-w' >> build/fpga/main.ut
echo '-g CclkPin:PULLUP' >> build/fpga/main.ut
echo '-g TdoPin:PULLNONE' >> build/fpga/main.ut
echo '-g M1Pin:PULLDOWN' >> build/fpga/main.ut
echo '-g DonePin:PULLUP' >> build/fpga/main.ut
echo '-g DriveDone:No' >> build/fpga/main.ut
echo '-g StartUpClk:JTAGCLK' >> build/fpga/main.ut
echo '-g DONE_cycle:4' >> build/fpga/main.ut
echo '-g GTS_cycle:5' >> build/fpga/main.ut
echo '-g M0Pin:PULLUP' >> build/fpga/main.ut
echo '-g M2Pin:PULLUP' >> build/fpga/main.ut
echo '-g ProgPin:PULLUP' >> build/fpga/main.ut
echo '-g TckPin:PULLUP' >> build/fpga/main.ut
echo '-g TdiPin:PULLUP' >> build/fpga/main.ut
echo '-g TmsPin:PULLUP' >> build/fpga/main.ut
echo '-g DonePipe:No' >> build/fpga/main.ut
echo '-g GWE_cycle:6' >> build/fpga/main.ut
echo '-g LCK_cycle:NoWait' >> build/fpga/main.ut
echo '-g Security:NONE' >> build/fpga/main.ut
echo '-g Persist:No' >> build/fpga/main.ut
$(xilinx_ise)xst ${intstyle} -ifn main.xst -ofn main.syr < main.xst \
| grep --line-buffered -v 'been backward balanced into' \
| grep --line-buffered -v 'IDDR has been replaced by IDDR_2CLK' \
| grep --line-buffered -v 'WARNING:Xst:616 - Invalid property'
cat build/fpga/*.ucf > build/fpga/main.ucf
$(xilinx_ise)ngdbuild ${intstyle} -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
$(xilinx_ise)map ${intstyle} -ol ${effort} -p $(device) -pr b -cm ${opt_for} -o main_map.ncd main.ngd main.pcf
$(xilinx_ise)par ${intstyle} -pl ${effort} -ol ${effort} -w main_map.ncd main.ncd main.pcf
$(xilinx_ise)trce ${intstyle} -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
$(xilinx_ise)bitgen ${intstyle} -f main.ut main.ncd
$(xilinx) tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ${board} -ace mainx.ace
mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same?
runserver: fleet.jar
java -Djava.library.path=lib -cp fleet.jar:lib/RXTXcomm.jar edu.berkeley.fleet.fpga.Server
test: fleet.jar
$(java) -jar fleet.jar test ships/*.ship tests
java -cp fleet.jar edu.berkeley.fleet.dataflow.MergeSort interpreter Memory 0 256
testfpga: fleet.jar
$(java) -jar fleet.jar target=fpga test ships/*.ship tests
java -cp fleet.jar edu.berkeley.fleet.dataflow.MergeSort fpga Memory 0 256
## Manual ####################################################################################
svgs = $(shell find doc -name \*.svg)
%.eps: %.svg
DISPLAY= /Applications/Inkscape.app/Contents//Resources/bin/inkscape -z --export-area-drawing $^ --export-eps=$@
%.pdf: %.eps
epstopdf $^ --outfile=$@
manual: archmanual toolmanual
archmanual: fleet.jar $(svgs:%.svg=%.pdf)
$(java) -jar fleet.jar doc
cd .tmp; ln -sf ../doc/*.bib .
cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex
cd .tmp; for A in *.mp; do mpost --tex=latex $$A; done
cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex
open .tmp/FleetTwo.Manual.pdf
toolmanual: fleet.jar $(svgs:%.svg=%.pdf)
$(java) -jar fleet.jar doc
cd .tmp; ln -sf ../doc/*.bib .
cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex toolchain.tex
open .tmp/toolchain.pdf
## API docs ####################################################################################
javadoc:
javadoc \
-linksource \
-windowtitle "FleetCode API Documentation" \
-sourcepath src \
-header "FleetCode API Documentation
" \
-public \
-notree \
-nonavbar \
-noqualifier all \
-stylesheetfile doc/javadoc.css \
-d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc/ \
edu.berkeley.fleet.api
javadoc \
-linksource \
-windowtitle "FleetCode API Documentation" \
-sourcepath src \
-header "FleetCode API Documentation
" \
-public \
-notree \
-nonavbar \
-noqualifier all \
-stylesheetfile doc/javadoc.css \
-d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc-private/ \
`find src/edu/berkeley/fleet -name \*.java`
open http://fleet.cs.berkeley.edu/code/javadoc/
open http://fleet.cs.berkeley.edu/code/javadoc-private/
## Misc ####################################################################################
clean:
rm -rf fleet.jar build
rm -f \
chips/marina/testCode/marina.xml \
chips/marina/testCode/marina.v \
chips/marina/testCode/marina.schematic-parasitics.spi
## Dist ####################################################################################
#dist:
# darcs record
# darcs push /afs/research.cs.berkeley.edu/class/fleet/website/repos/fleet/
# darcs get . --repo-name=fleet-`date +%d.%h.%y`
# make -C fleet-`date +%d.%h.%y` fleet.jar
# rm -rf fleet-`date +%d.%h.%y`/build
# echo 'http://research.cs.berkeley.edu/class/fleet/repos/fleet/' > \
# fleet-`date +%d.%h.%y`/_darcs/prefs/defaultrepo
# tar cvzf fleet-`date +%d.%h.%y`.tgz fleet-`date +%d.%h.%y`
# rm -rf fleet-`date +%d.%h.%y`
# mv fleet-`date +%d.%h.%y`.tgz /afs/research.cs.berkeley.edu/class/fleet/website/files/
# @echo
# @echo
# @echo http://research.cs.berkeley.edu/class/fleet/files/fleet-`date +%d.%h.%y`.tgz
# @echo
# @echo
#
dist: fleet.jar
darcs dist -d fleet
mv fleet.tar.gz /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.tgz
mkdir -p .build
cd .build; for A in ../fleet.jar ../lib/*.jar; do jar xvf $$A; done
cd .build; jar cvf /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.jar .
rm -rf .build
echo
echo http://fleet.cs.berkeley.edu/code/snapshots/fleet-`date +%Y.%m.%d`.jar
echo
# you'll probably want to change this line
ghc = /usr/local/brian/ghc/compiler/ghc-inplace
ghc += -fglasgow-exts -fallow-undecidable-instances -fallow-overlapping-instances -cpp
ghc += -i$(shell pwd)/build/hi/ -hidir $(shell pwd)/build/hi/ -odir $(shell pwd)/build/class/
f0: fleet.jar
mkdir -p build/hi build/class
cd lib; $(ghc) -c -java SBP.lhs
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Util.lhs
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Fleet.lhs
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Types.lhs
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Compile.lhs
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Main.lhs
$(java) -cp build/class:lib/HSbase.jar:lib/HSrts.jar:lib/HSstm.jar:fleet.jar Main
## Targets below are for integration with Sun-Proprietary Marina Test Chip ##############################
electric_jar = ~/proj/electric/srcj/electric.jar
electric = java -Xss2m -XX:MaxPermSize=128m -Xmx2000m -jar ${electric_jar}
electric_headless = java -Xmx1500m -jar -Djava.awt.headless=true ${electric_jar} -batch
all_electric_files = $(shell find chips/marina/electric/ -name \*.jelib -or -path \*.delib\*)
modname = fakeMarinaPadframe
sun_server = simmons-tunnel
#sun_server = frehley # electric team uses frehley
#sun_server = simmons
#sun_server = criss # criss is used for nohupped nanosim
#sun_server = stanley # stanley is used for nohupped hsim
testnum = 0
runtest: fleet.jar chips/marina/testCode/marina.xml chips/marina/testCode/marina.v chips/marina/testCode/marina.schematic-parasitics.spi
${rsync} --delete ./ ${sun_server}:~/fleet/
time ssh -t -Y ${sun_server} 'cd ~/fleet/; make testlocal'
silicon: fleet.jar chips/marina/testCode/marina.xml
${rsync} --delete ./ ${sun_server}:~/fleet/
time ssh -t -Y ${sun_server} 'cd ~/fleet/; make siliconlocal'
spice: fleet.jar
cp ~/omegaCounter.spi chips/marina/testCode/omegaCounter.spi
cp ~/omegaCounter-extracted.spi chips/marina/testCode/omegaCounter-extracted.spi
rsync -azre ssh --delete --progress --verbose ./ ${sun_server}:~/fleet/
ssh -t -Y ${sun_server} 'cd ~/fleet/chips/marina/testCode/; export PATH=/proj/async/cad/linux/bin/:$$PATH; echo -e "rcf commands\n" | hsim64 -time 90000 go.spi -o go.spi'
testlocal: fleet.jar
cd chips/marina/testCode; \
export PATH=/proj/async/cad/linux/bin/:$$PATH; \
/proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java \
-cp `pwd`/../../../lib/com.sun.async.test.jar:`pwd`/../../../fleet.jar \
com.sun.vlsi.chips.marina.test.MarinaTest \
-hsim \
-testNum ${testnum} || tail -n 20 marina.spi.run
siliconlocal: fleet.jar
cd chips/marina/testCode; \
export PATH=/proj/async/cad/linux/bin/:$$PATH; \
/proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java \
-cp `pwd`/../../../lib/com.sun.async.test.jar:`pwd`/../../../fleet.jar \
-Djava.library.path=/proj/async/cad/test/ \
com.sun.vlsi.chips.marina.test.MarinaTest \
-silicon \
-testNum ${testnum}
chips/marina/testCode/marina.xml \
chips/marina/testCode/marina.v \
chips/marina/testCode/marina.schematic-parasitics.spi: ${all_electric_files}
@echo
@echo == Rebuilding Netlists and XML ===========================================================
rm -f chips/marina/testCode/marina.v
rm -f chips/marina/testCode/marina.schematic-parasitics.spi
rm -f chips/marina/testCode/marina.xml
cd chips/marina/testCode; \
nice -n 19 ${electric_headless} -s regen.bsh ../electric/aMarinaM.jelib
electric:
${electric} chips/marina/electric/aMarinaM.jelib
chaing:
java -cp lib/com.sun.async.test.jar com.sun.async.test.ChainG chips/marina/testCode/marina.xml
sync:
${rsync} ${sun_server}:fleet/chips/marina/testCode/marina\*.dump ~/ || true
${rsync} ${sun_server}:fleet/chips/marina/testCode/marina.spi.out ~/${modname}.out || true
copyin:
cp ~/${modname}.spi chips/marina/testCode/marina.schematic-parasitics.spi || true
cp ~/${modname}.v chips/marina/testCode/marina.v || true
chips/marina/testCode/omegaCounter-extracted.spi: ${all_electric_files} chips/marina/testCode/rcx.bsh
@echo
@echo == Extracting Layout ===========================================================
ssh ${sun_server} 'rm -rf /tmp/am77536; mkdir /tmp/am77536'
cd chips/marina/testCode; \
nice -n 19 ${electric_headless} -s rcx.bsh ../electric/omegaCounter.jelib
mv chips/marina/electric/starrcxt/omegaCounter.sp $@