Hgates2inM|8.10k

# External Libraries:

LredFive|redFive

# Cell mux5;1{sch}
Cmux5;1{sch}||schematic|1215934868816|1216236894155|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-12|-9||||
NOff-Page|conn@1||-12|9||||
NOff-Page|conn@2||12|0||||
NOff-Page|conn@3||-12|0||||
Imux5;1{ic}|mux10@0||29|17|||D5G4;
Ngeneric:Invisible-Pin|pin@0||0.5|23.5|||||ART_message(D5G3;)Sies 13 July 2008
Ngeneric:Invisible-Pin|pin@1||-0.5|27.5|||||ART_message(D5G4;)Stwo input inverting mux
Ngeneric:Invisible-Pin|pin@2||1.5|32.5|||||ART_message(D5G6;)Smux5
NWire_Pin|pin@3||6|9||||
NWire_Pin|pin@4||6|-9||||
NWire_Pin|pin@5||6|0||||
NWire_Pin|pin@6||0|15||||
NWire_Pin|pin@9||0|-15||||
IredFive:triInv;1{ic}|triInv@0||0|9|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-1.5;)I100|ATTR_X(D5G1.5;NPX2.5;Y2;)S5
IredFive:triInv;1{ic}|triInv@1||0|-9|||D5G4;|ATTR_Delay(D5G1;NPX3.5;Y-1.5;)I100|ATTR_X(D5G1.5;NPX2.5;Y2;)S5
Awire|net@0|||1800|triInv@0|out|2.5|9|pin@3||6|9
Awire|net@1|||900|pin@3||6|9|pin@5||6|0
Awire|net@2|||0|pin@4||6|-9|triInv@1|out|2.5|-9
Awire|net@3|||1800|conn@1|y|-10|9|triInv@0|in|-2.5|9
Awire|net@4|||1800|conn@0|y|-10|-9|triInv@1|in|-2.5|-9
Awire|net@5|||900|pin@5||6|0|pin@4||6|-9
Awire|net@6|||0|conn@2|a|10|0|pin@5||6|0
Awire|s[F]|D5G2;||2700|triInv@0|enB|0|11|pin@6||0|15
Awire|s[F]|D5G2;||900|triInv@1|en|0|-11|pin@9||0|-15
Awire|s[T]|D5G2;||2700|triInv@1|enB|0|-7|triInv@0|en|0|7
EinA[1]||D4G2;|conn@1|a|I
EinB[1]||D4G2;|conn@0|a|I
Eout[1]||D6G2;|conn@2|y|O
EinA[2]|s[T,F]|D4G2;|conn@3|a|I
X