HlatchesK|8.10k

# External Libraries:

LorangeTSMC090nm|orangeTSMC090nm

LredFive|redFive

# Cell latch2in30Bmc;1{sch}
Clatch2in30Bmc;1{sch}||schematic|1194187081843|1207493280050|
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-21|0||||
NOff-Page|conn@1||-21|9||||
NOff-Page|conn@3||-21|-9||||
NOff-Page|conn@4||27|0||||
Iraw2inLatchTmcLO;1{ic}|hi2inLat@0||-9|0|||D5G4;
IredFive:invLT;1{ic}|invLT@0||6|0|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
IredFive:inv;1{ic}|invLT@1||18|0|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S30|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
Ilatch2in30Bmc;1{ic}|latch2in@0||33|15|||D5G4;
Ngeneric:Invisible-Pin|pin@0||0|15.5|||||ART_message(D5FLeave alone;G3;)Sies 6 April 2008
Ngeneric:Invisible-Pin|pin@1||0|22.5|||||ART_message(D5FLeave alone;G4;)S[latch with two amplifiers,and Master Clear]
Ngeneric:Invisible-Pin|pin@2||0|31.5|||||ART_message(D5G6;)Slatch2in30Bmc
NWire_Pin|pin@8||-11|9||||
NWire_Pin|pin@9||-11|-9||||
IorangeTSMC090nm:wire90;1{ic}|wire90@0||0|0|||D0G4;|ATTR_L(D5G1;PUD)D261.79999999999995|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
IorangeTSMC090nm:wire90;1{ic}|wire90@1||12|0|||D0G4;|ATTR_L(D5G1;PUD)D329.19999999999993|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
Awire|net@8|||1800|conn@1|y|-19|9|pin@8||-11|9
Awire|net@9|||900|pin@8||-11|9|hi2inLat@0|hcl|-11|3
Awire|net@10|||1800|conn@3|y|-19|-9|pin@9||-11|-9
Awire|net@11|||2700|pin@9||-11|-9|hi2inLat@0|mc|-11|-3
Awire|net@14|||0|wire90@0|a|-2.5|0|hi2inLat@0|out[T]|-6|0
Awire|net@15|||0|invLT@0|in|3.5|0|wire90@0|b|2.5|0
Awire|net@16|||1800|wire90@1|b|14.5|0|invLT@1|in|15.5|0
Awire|net@18|||0|wire90@1|a|9.5|0|invLT@0|out|8.5|0
Awire|net@25|||0|conn@4|a|25|0|invLT@1|out|20.5|0
Awire|net@33|||1800|conn@0|y|-19|0|hi2inLat@0|inA[1]|-12|0
Ehcl[A]|hcl|D4G2;|conn@1|a|I
EinA[1]||D4G2;|conn@0|a|I
Ehcl[B]|mc|D4G2;|conn@3|a|I
Eout[1]||D6G2;|conn@4|y|O
X