HredFive|8.10k

# External Libraries:

LorangeTSMC090nm|orangeTSMC090nm

# Cell nand3LT;1{sch}
Cnand3LT;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-30;Y-12.5;)I100|ATTR_X(D5FLeave alone;G1;HNOLPX-30;Y-11.5;)S1|ATTR_drive0(D5G1;HNPTX-30;Y-13.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-30;Y-14.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX19;Y-23;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb), $(inc));|prototype_center()I[0,0]
IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||4.5|4|YRR||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IorangeTSMC090nm:PMOSx;1{ic}|PMOS@1||-5|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
IorangeTSMC090nm:PMOSx;1{ic}|PMOS@2||-14|4|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X/3.
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-28|4||||
NOff-Page|conn@1||0|11|||R|
NOff-Page|conn@2||17|4|||RR|
NOff-Page|conn@3||-27.5|-2.5||||
Inand3LT;1{ic}|nand3LT@0||35|19.5|||D0G4;|ATTR_Delay(D5G1;NPX4;Y-2.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX3;Y2.5;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_LEGATE()I1|ATTR_su()I-1
Inms3;1{ic}|nms3@0||-5|-16.5|||D0G4;|ATTR_Delay(D5G1;NOJPX3;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX-2;Y0.5;)S@X
NWire_Pin|pin@0||-14|0||||
Ngeneric:Invisible-Pin|pin@1||-0.5|25|||||ART_message(D5G6;)S[nand3LT]
NWire_Pin|pin@2||10.5|4||||
NWire_Pin|pin@3||4.5|0||||
Ngeneric:Invisible-Pin|pin@4||-0.5|20|||||ART_message(D5G2;)S[one-parameter NAND]
NWire_Pin|pin@5||-5|0||||
NWire_Pin|pin@6||0|0||||
NWire_Pin|pin@7||-9|4||||
Ngeneric:Invisible-Pin|pin@8||-0.5|18|||||ART_message(D5G2;)S[P to N width ratio is 2/3 to 3]
Ngeneric:Invisible-Pin|pin@9||28.5|-16|||||ART_message(D5G2;)S[X is drive strength,Three pull-ups have the same strength,as the pull-down]
Ngeneric:Invisible-Pin|pin@10||-1|15.5|||||ART_message(D5G2;)S[Sized assuming that all 3 inputs go low together]
NWire_Pin|pin@11||-14|7.5||||
NWire_Pin|pin@12||4.5|7.5||||
NWire_Pin|pin@13||-5|7.5||||
NWire_Pin|pin@14||-9|-2.5||||
NWire_Pin|pin@15||-21.5|-2.5||||
NWire_Pin|pin@16||-19.5|4||||
NWire_Pin|pin@17||10.5|-12.5||||
NWire_Pin|pin@18||-21.5|-16.5||||
NWire_Pin|pin@19||-19.5|-8.5||||
NPower|pwr@0||-5|10.5||||
Awire|net@0|||2700|nms3@0|d|-5|-6.5|pin@5||-5|0
Awire|net@1|||1800|pin@19||-19.5|-8.5|nms3@0|g3|-8|-8.5
Awire|net@2|||0|pin@17||10.5|-12.5|nms3@0|g2|-2|-12.5
Awire|net@3|||1800|pin@18||-21.5|-16.5|nms3@0|g|-8|-16.5
Awire|net@4|||0|pin@5||-5|0|pin@0||-14|0
Awire|net@5|||1800|pin@2||10.5|4|conn@2|y|15|4
Awire|net@6|||0|pin@6||0|0|pin@5||-5|0
Awire|net@7|||0|pin@3||4.5|0|pin@6||0|0
Awire|net@8|||2700|pin@6||0|0|conn@1|a|0|9
Awire|net@9|||0|pin@13||-5|7.5|pin@11||-14|7.5
Awire|net@10|||0|pin@12||4.5|7.5|pin@13||-5|7.5
Awire|net@11|||2700|pin@13||-5|7.5|pwr@0||-5|10.5
Awire|net@12|||2700|pin@14||-9|-2.5|pin@7||-9|4
Awire|net@13|||0|pin@15||-21.5|-2.5|conn@3|y|-25.5|-2.5
Awire|net@14|||0|pin@14||-9|-2.5|pin@15||-21.5|-2.5
Awire|net@15|||1800|conn@0|y|-26|4|pin@16||-19.5|4
Awire|net@16|||2700|pin@3||4.5|0|PMOS@0|d|4.5|2
Awire|net@17|||0|pin@2||10.5|4|PMOS@0|g|7.5|4
Awire|net@18|||2700|PMOS@0|s|4.5|6|pin@12||4.5|7.5
Awire|net@19|||2700|pin@5||-5|0|PMOS@1|d|-5|2
Awire|net@20|||1800|pin@7||-9|4|PMOS@1|g|-8|4
Awire|net@21|||900|pin@13||-5|7.5|PMOS@1|s|-5|6
Awire|net@22|||2700|pin@0||-14|0|PMOS@2|d|-14|2
Awire|net@23|||1800|pin@16||-19.5|4|PMOS@2|g|-17|4
Awire|net@24|||900|pin@11||-14|7.5|PMOS@2|s|-14|6
Awire|net@25|||2700|pin@17||10.5|-12.5|pin@2||10.5|4
Awire|net@26|||900|pin@15||-21.5|-2.5|pin@18||-21.5|-16.5
Awire|net@27|||900|pin@16||-19.5|4|pin@19||-19.5|-8.5
Eina||D5G2;|conn@3|a|I
Einb||D5G2;|conn@2|a|I
Einc||D5G2;|conn@0|y|I
Eout||D5G2;|conn@1|y|O
X