HredFive|8.10k

# Cell invKV;1{sch}
CinvKV;1{sch}||schematic|1021415734000|1248729331835||ATTR_Delay(D5G1;HNPX-11.5;Y-5.5;)I100|ATTR_XN(D5FLeave alone;G1;HNOLPX-11.5;Y-3.5;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-11.5;Y-4.5;)S1|ATTR_drive0(D5G1;HNPTX-11;Y-6.5;)Sweak0|ATTR_drive1(D5G1;HNPTX-11;Y-7.5;)Sweak1|ATTR_verilog_template(D5G1;NTX24.5;Y-13;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0]
INMOS;1{ic}|NMOS@0||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XN
IPMOS;1{ic}|PMOS@0||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XP
Ngeneric:Facet-Center|art@0||0|0||||AV
NOff-Page|conn@0||-11|0||||
NOff-Page|conn@1||8|0||||
NGround|gnd@0||0|-11||||
IinvKV;1{ic}|invKV@0||21.5|9|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;NOLPX1.5;Y-2.25;)S1|ATTR_XP(D5FLeave alone;G1.5;NOLPX1.5;Y1.75;)S1|ATTR_drive0(P)Sweak0|ATTR_drive1(P)Sweak1
Ngeneric:Invisible-Pin|pin@0||26|-7.5|||||ART_message(D5G2;)S[X is drive strength,"P and N drive strengths are XP, XN"]
NWire_Pin|pin@1||-4|-6||||
NWire_Pin|pin@2||-4|6||||
NWire_Pin|pin@3||0|0||||
NWire_Pin|pin@4||-4|0||||
Ngeneric:Invisible-Pin|pin@5||-0.5|17|||||ART_message(D5G6;)S[invKV]
Ngeneric:Invisible-Pin|pin@6||-1|13.5|||||ART_message(D5G2;)S[Two parameter variable ratio keeper]
NPower|pwr@0||0|10.5||||
Awire|net@0|||1800|pin@1||-4|-6|NMOS@0|g|-3|-6
Awire|net@1|||2700|PMOS@0|s|0|8|pwr@0||0|10.5
Awire|net@2|||1800|pin@2||-4|6|PMOS@0|g|-3|6
Awire|net@3|||2700|pin@3||0|0|PMOS@0|d|0|4
Awire|net@4|||900|NMOS@0|s|0|-8|gnd@0||0|-9
Awire|net@5|||2700|NMOS@0|d|0|-4|pin@3||0|0
Awire|net@6|||1800|conn@0|y|-9|0|pin@4||-4|0
Awire|net@7|||0|conn@1|a|6|0|pin@3||0|0
Awire|net@8|||2700|pin@1||-4|-6|pin@4||-4|0
Awire|net@9|||2700|pin@4||-4|0|pin@2||-4|6
Ein||D5G2;|conn@0|a|I
Eout||D5G2;|conn@1|y|O
X