\documentclass[10pt,oneside]{book}
\reversemarginpar 
\usepackage{palatino}
\usepackage{parskip}
\usepackage{register}
\usepackage{bytefield}
\renewcommand{\ttdefault}{cmtt}
\title{The FleetTwo Architecture Manual}
\begin{document}
\maketitle
\pagebreak
\section*{Glossary}

Port\\
Inlet\\
Outlet\\
Pump\\
Packet\\
Data Item\\
Opcode Port\\
Bypass\\


\pagebreak
\section*{Data Formats}

\subsection*{Packet Destination Address (12 bits)}

These bits appear physically within the switch fabric, and have
``address bit timing.''  The {\tt T} bit is the ``tokenhood'' bit; if
set, this packet represents a token and it does not cause the switch
fabric data latches to fire.

{\tt\footnotesize
\begin{bytefield}{49}
  \bitheader[b]{37,47,48}\\
  \bitbox{1}{T} 
  \bitbox{11}{Destination Address} 
  \bitbox[l]{37}{} 
\end{bytefield}
}

\subsection*{Data Word In Memory (37 bits)}

A word of memory is 37 bits wide.  For convenience, we assume that the
memory word width is also the width of a pointer as well as the width
of all on-chip data item registers.

{\tt\footnotesize
\begin{bytefield}{49}
  \bitheader[b]{0,36}\\
  \bitbox[r]{12}{}
  \bitbox{37}{Data Word} 
\end{bytefield}
}

\subsection*{Data Packet In Flight (49 bits)}

A {\it data packet} is a data item in the switch fabric, on its way to
some destination.

{\tt\footnotesize
\begin{bytefield}{49}
  \bitheader[b]{0,36,37,47,48}\\
  \bitbox{1}{T} 
  \bitbox{11}{Destination Address} 
  \bitbox{37}{Data Word} 
\end{bytefield}
}

\subsection*{Instruction In Memory (37 bits)}

An instruction must be no wider than a memory word.  The next section
explains the bits in greater detail.

{\tt\tiny
\begin{bytefield}{49}
  \bitheader[b]{0,10,11,17,18-26,36}\\
  \bitbox[r]{12}{}
  \bitbox{11}{Instruction Register Address} 
  \bitbox{1}{K} 
  \bitbox{1}{L} 
  \bitbox{1}{Ti} 
  \bitbox{1}{Di} 
  \bitbox{1}{Dc} 
  \bitbox{1}{Do} 
  \bitbox{1}{To} 
  \bitbox{1}{Rq} 
  \bitbox{7}{Count} 
  \bitbox{11}{Data/Token Destination} 
\end{bytefield}
}

\subsection*{Instruction Packet In Flight (49 bits)}

A {\it instruction packet} is an instruction in the instruction horn
(which may or may not be the same thing as the data horn), on its way
to some instruction register (Valve).

{\tt\tiny
\begin{bytefield}{49}
  \bitheader[b]{0,10,11,17,18-25,37,47,48}\\
  \bitbox[r]{1}{0} 
  \bitbox{11}{Instruction Register Address} 
  \bitbox[lr]{11}{}
  \bitbox{1}{K} 
  \bitbox{1}{L} 
  \bitbox{1}{Ti} 
  \bitbox{1}{Di} 
  \bitbox{1}{Dc} 
  \bitbox{1}{Do} 
  \bitbox{1}{To} 
  \bitbox{1}{Rq} 
  \bitbox{7}{Count} 
  \bitbox{11}{Data/Token Destination} 
\end{bytefield}
}


\pagebreak

\section*{Instruction Formats}

Instructions can be grouped into two categories: {\it killing}
instructions, which are acted upon as soon as they leave the
instruction horn, and {\it executing} instructions, which pass through
the instruction queue before being acted upon.

Blank fields below are reserved for future use and must be set to
zero.

Note that the arbiter is requested whenever {\it any of the first
  three bits is {\tt 1}}.  If the arbiter is not requested, 



\setlength{\bitwidth}{5mm}

\subsection*{Killing Instructions}

Kill (kill anything other than a Clog)

{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,6,7,20-25}\\
  \bitbox{1}{0} 
  \bitbox{1}{0} 
  \bitbox{1}{1} 
  \bitbox{1}{0} 
  \bitbox{1}{1} 
  \bitbox{14}{}
  \bitbox{7}{Count} 
\end{bytefield}}

UnClog (kill a Clog)

{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,20-25}\\
  \bitbox{1}{0} 
  \bitbox{1}{0} 
  \bitbox{1}{0} 
  \bitbox{1}{1} 
  \bitbox{1}{0} 
  \bitbox{21}{}
\end{bytefield}}

\subsection*{Executing Instructions}
Clog

{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,20-25}\\
  \bitbox{1}{0} 
  \bitbox{1}{0} 
  \bitbox{1}{1} 
  \bitbox{1}{0} 
  \bitbox{1}{0} 
  \bitbox{21}{}
\end{bytefield}}

Literal (sign extended, implicit {\tt Rq=1})

{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,6,7,23-25}\\
  \bitbox{1}{0} 
  \bitbox{1}{1} 
  \bitbox{17}{Literal}
  \bitbox{7}{Count} 
\end{bytefield}}


Normal

{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,6,7,17-25}\\
  \bitbox{1}{1} 
  \bitbox{1}{Ti} 
  \bitbox{1}{Di} 
  \bitbox{1}{Dc} 
  \bitbox{1}{Do} 
  \bitbox{1}{To} 
  \bitbox{1}{Rq} 
  \bitbox{1}{Ig} 
  \bitbox{11}{Dest} 
  \bitbox{7}{Count} 
\end{bytefield}}




\pagebreak
\subsection*{Field Descriptions}
{\tt
\begin{bytefield}{26}
  \bitheader[b]{0,6,7,16-25}\\
  \bitbox{1}{0} 
  \bitbox{1}{Ti} 
  \bitbox{1}{Di} 
  \bitbox{1}{Dc} 
  \bitbox{1}{Do} 
  \bitbox{1}{To} 
  \bitbox{1}{Rq} 
  \bitbox{1}{Ig} 
  \bitbox{11}{Dest} 
  \bitbox{7}{Count} 
\end{bytefield}
}

\begin{itemize}

  \item [\tt Ti] ({\bf Token Input}) wait for a token and accept
                 it\footnote{{\tt Ti}=1,{\tt Di}=1 is invalid on inbox.}

  \item [\tt Di] ({\bf Data Input}) wait for a datum and accept it.

  \item [\tt Dc] ({\bf Data Capture}) capture (latch) the accepted
                 datum.  This bit is ignored if the incoming packet is
                 a token. \footnote{ Note that {\tt Di}=0,{\tt Dc}=1
                 is meaningless and therefore reserved for other
                 uses.}

  \item [\tt Do] ({\bf Data Output}) emit a datum.

  \item [\tt To] ({\bf Token Output}) emit a token.\footnote{ {\tt To}=1,{\tt
                 Do}=1 is invalid on outbox.}

  \item [\tt Rq] ({\bf ReQueue}) if set, instructions having nonzero
                 count are ``Re-Queued'' rather than RePeated.  See
                 {\tt Count} for more detail. \footnote{ An
                 instruction {\it in memory} may not have {\tt
                 Rq=1,Count=0} (use {\tt Rq=0,Count=0})}

  \item [\tt Ig] ({\bf Ignore Until Last Iteration}) ignore this
                 instruction until its {\tt Count=0} \footnote{{\tt
                 Rq}=0,{\tt Ig}=1 is invalid}

  \item  [\tt Count] ({\bf Count}) {\it After} executing:
\begin{verbatim}
if (Count==0) {
    discard this instruction
} else {
    if Count<1111111 {
      decrement count
    }
    if Rq=1 or Literal {
       put this instruction back into the instruction fifo
    } else {
       execute this instruction again
    }
}
\end{verbatim}
Note how a ``standing'' instruction is encoded as {\tt Count=1111111}       

\item [\tt Dest] ({\bf Data/Token Destination})
   This field is copied into the address portion of any outgoing
   packet ({\tt Do} on an outbox or {\tt To}).

\end{itemize}

