{-# GHC_PRAGMA INTERFACE VERSION 5 #-} interface SparcCode where import AbsCSyn(MagicId) import AsmRegAlloc(MachineCode, MachineRegisters, Reg) import BitSet(BitSet) import CLabelInfo(CLabel) import CharSeq(CSeq) import FiniteMap(FiniteMap) import Maybes(Labda) import OrdList(OrdList) import PreludePS(_PackedString) import Pretty(PprStyle) import PrimKind(PrimKind) import Stix(CodeSegment) import UniqFM(UniqFM) import UniqSet(UniqSet(..)) import Unique(Unique) data Addr = AddrRegReg Reg Reg | AddrRegImm Reg Imm data MagicId data Reg data BitSet data CLabel data CSeq data FiniteMap a b data OrdList a data PrimKind data CodeSegment data Cond = ALWAYS | NEVER | GEU | LU | EQ | GT | GE | GU | LT | LE | LEU | NE | NEG | POS | VC | VS data Imm = ImmInt Int | ImmInteger Integer | ImmCLbl CLabel | ImmLab CSeq | ImmLit CSeq | LO Imm | HI Imm data RI = RIReg Reg | RIImm Imm data Size = SB | HW | UB | UHW | W | D | F | DF type SparcCode = OrdList SparcInstr data SparcInstr = LD Size Addr Reg | ST Size Reg Addr | ADD Bool Bool Reg RI Reg | SUB Bool Bool Reg RI Reg | AND Bool Reg RI Reg | ANDN Bool Reg RI Reg | OR Bool Reg RI Reg | ORN Bool Reg RI Reg | XOR Bool Reg RI Reg | XNOR Bool Reg RI Reg | SLL Reg RI Reg | SRL Reg RI Reg | SRA Reg RI Reg | SETHI Imm Reg | NOP | FABS Size Reg Reg | FADD Size Reg Reg Reg | FCMP Bool Size Reg Reg | FDIV Size Reg Reg Reg | FMOV Size Reg Reg | FMUL Size Reg Reg Reg | FNEG Size Reg Reg | FSQRT Size Reg Reg | FSUB Size Reg Reg Reg | FxTOy Size Size Reg Reg | BI Cond Bool Imm | BF Cond Bool Imm | JMP Addr | CALL Imm Int Bool | LABEL CLabel | COMMENT _PackedString | SEGMENT CodeSegment | ASCII Bool [Char] | DATA Size [Imm] data SparcRegs data UniqFM a type UniqSet a = UniqFM a data Unique argRegs :: [Reg] baseRegOffset :: MagicId -> Int callerSaves :: MagicId -> Bool f0 :: Reg fp :: Reg freeRegs :: [Reg] g0 :: Reg is13Bits :: Integral a => a -> Bool kindToSize :: PrimKind -> Size o0 :: Reg offset :: Addr -> Int -> Labda Addr printLabeledCodes :: PprStyle -> [SparcInstr] -> CSeq reservedRegs :: [Int] sp :: Reg stgRegMap :: MagicId -> Labda Reg strImmLit :: [Char] -> Imm instance MachineCode SparcInstr instance MachineRegisters SparcRegs