#expect 0

#ship mem1  : Memory
#ship mem2  : Memory
#ship mem3  : Memory
#ship alu   : Alu2
#ship counter1   : Alu2
#ship counter2   : Alu2
#ship debug : Debug

debug.in:   [*] recv, deliver;
mem1.inCBD:
  literal SETUP; deliver;
  recv;
  recv;
  literal GO; deliver;

SETUP: {
mem1.inAddrWrite: literal 1000; [11] deliver;
mem1.inDataWrite:
  literal 10; deliver;
  literal 1;  deliver;
  literal 2;  deliver;
  literal 3;  deliver;
  literal 4;  deliver;
  literal 5;  deliver;
  literal 6;  deliver;
  literal 7;  deliver;
  literal 8;  deliver;
  literal 9;  deliver;
mem1.out:
  [11] collect;
  notify mem1.inCBD;
mem2.inAddrWrite: literal 1000; [11] deliver;
mem2.inDataWrite:
  literal 10; deliver;
  literal 1;  deliver;
  literal 2;  deliver;
  literal 3;  deliver;
  literal 4;  deliver;
  literal 5;  deliver;
  literal 6;  deliver;
  literal 7;  deliver;
  literal 8;  deliver;
  literal 9;  deliver;
mem2.out:
  [11] collect;
  notify mem1.inCBD;
}

GO: {

mem1.inAddrRead:  literal 1000; deliver;
mem2.inAddrRead:  literal 1000; deliver;

// normally we would write to memory, but here we send to debug
//mem3.inAddrWrite: literal 0; deliver;
//mem3.out:         [*] collect, sendto debug.in;

alu.in1:  [*] recv, deliver;
alu.in2:  [*] recv, deliver;
alu.inOp: literal Alu2.inOp[MAX]; deliver; literal Alu2.inOp[ADD]; [*] deliver;
//alu.out:  [*] collect, sendto debug.in;

mem1.out:
  collect;
  sendto counter1.in1;
  sendto alu.in1;
  load repeat counter;
  collect, sendto alu.in1;
mem2.out:
  collect;
  sendto counter2.in1;
  sendto alu.in2;
  load repeat counter;
  collect, sendto alu.in2;

counter1.in1:  literal 10; load repeat counter; literal 1; deliver;
counter1.in2:  literal 0; deliver; [*] recv, deliver;
counter1.inOp: literal Alu2.inOp[ADD]; [*] deliver;
counter1.out:  load loop counter with 1; collect; sendto debug.in; unclog;

}