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TysWiredIn is now warning-free
[ghc-hetmet.git]
/
compiler
/
coreSyn
/
CoreSyn.lhs
diff --git
a/compiler/coreSyn/CoreSyn.lhs
b/compiler/coreSyn/CoreSyn.lhs
index
86a7e9d
..
f732a95
100644
(file)
--- a/
compiler/coreSyn/CoreSyn.lhs
+++ b/
compiler/coreSyn/CoreSyn.lhs
@@
-388,7
+388,7
@@
neverUnfold _ = False
instance Outputable AltCon where
ppr (DataAlt dc) = ppr dc
ppr (LitAlt lit) = ppr lit
instance Outputable AltCon where
ppr (DataAlt dc) = ppr dc
ppr (LitAlt lit) = ppr lit
- ppr DEFAULT = ptext SLIT("__DEFAULT")
+ ppr DEFAULT = ptext (sLit "__DEFAULT")
instance Show AltCon where
showsPrec p con = showsPrecSDoc p (ppr con)
instance Show AltCon where
showsPrec p con = showsPrecSDoc p (ppr con)