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Follow Digraph changes in RegAllocLinear.hs
[ghc-hetmet.git]
/
compiler
/
nativeGen
/
RegLiveness.hs
diff --git
a/compiler/nativeGen/RegLiveness.hs
b/compiler/nativeGen/RegLiveness.hs
index
d5336e4
..
96a264a
100644
(file)
--- a/
compiler/nativeGen/RegLiveness.hs
+++ b/
compiler/nativeGen/RegLiveness.hs
@@
-30,6
+30,7
@@
module RegLiveness (
) where
) where
+import BlockId
import MachRegs
import MachInstrs
import PprMach
import MachRegs
import MachInstrs
import PprMach
@@
-204,7
+205,7
@@
slurpConflicts live
= (consBag rsLiveEntry conflicts, moves)
| otherwise
= (consBag rsLiveEntry conflicts, moves)
| otherwise
- = error "RegLiveness.slurpBlock: bad block"
+ = panic "RegLiveness.slurpBlock: bad block"
slurpLIs rsLive (conflicts, moves) []
= (consBag rsLive conflicts, moves)
slurpLIs rsLive (conflicts, moves) []
= (consBag rsLive conflicts, moves)
@@
-243,14
+244,14
@@
slurpConflicts live
, moves) lis
, moves) lis
--- | For spill/reloads
+-- | For spill\/reloads
--
-- SPILL v1, slot1
-- ...
-- RELOAD slot1, v2
--
-- If we can arrange that v1 and v2 are allocated to the same hreg it's more likely
--
-- SPILL v1, slot1
-- ...
-- RELOAD slot1, v2
--
-- If we can arrange that v1 and v2 are allocated to the same hreg it's more likely
--- the spill/reload instrs can be cleaned and replaced by a nop reg-reg move.
+-- the spill\/reload instrs can be cleaned and replaced by a nop reg-reg move.
--
--
slurpReloadCoalesce :: LiveCmmTop -> Bag (Reg, Reg)
--
--
slurpReloadCoalesce :: LiveCmmTop -> Bag (Reg, Reg)
@@
-557,7
+558,7
@@
livenessSCCs blockmap done
concatMap tail $
groupBy (\(a1, _) (a2, _) -> eq a1 a2) $
iterate (\(a, _) -> f a b) $
concatMap tail $
groupBy (\(a1, _) (a2, _) -> eq a1 a2) $
iterate (\(a, _) -> f a b) $
- (a, error "RegLiveness.livenessSCCs")
+ (a, panic "RegLiveness.livenessSCCs")
linearLiveness :: BlockMap RegSet -> [NatBasicBlock]
linearLiveness :: BlockMap RegSet -> [NatBasicBlock]