Set DELETE_ON_ERROR in ghc.mk

[ghc-hetmet.git] / includes / MachRegs.h

diff --git a/includes/MachRegs.h b/includes/MachRegs.h
index f51f782..d607532 100644 (file)
--- a/includes/MachRegs.h
+++ b/includes/MachRegs.h
@@ -543,6 +543,10 @@
 /* -----------------------------------------------------------------------------
    The Sun SPARC register mapping
 
 /* -----------------------------------------------------------------------------
    The Sun SPARC register mapping
 

+   !! IMPORTANT: if you change this register mapping you must also update
+                 compiler/nativeGen/SPARC/Regs.hs. That file handles the
+                 mapping for the NCG. This one only affects via-c code.
+

    The SPARC register (window) story: Remember, within the Haskell
    Threaded World, we essentially ``shut down'' the register-window
    mechanism---the window doesn't move at all while in this World.  It
    The SPARC register (window) story: Remember, within the Haskell
    Threaded World, we essentially ``shut down'' the register-window
    mechanism---the window doesn't move at all while in this World.  It

@@ -590,11 +594,11 @@
      %i1        Base
      %i2        SpLim
      %i3        Hp
      %i1        Base
      %i2        SpLim
      %i3        Hp

+     %i4        alloc

      %i5        R6
      %i6                    C frame ptr
      %i7                    C ret addr
      
      %i5        R6
      %i6                    C frame ptr
      %i7                    C ret addr
      

-

    The paired nature of the floating point registers causes complications for
    the native code generator.  For convenience, we pretend that the first 22
    fp regs %f0 .. %f21 are actually 11 double regs, and the remaining 10 are
    The paired nature of the floating point registers causes complications for
    the native code generator.  For convenience, we pretend that the first 22
    fp regs %f0 .. %f21 are actually 11 double regs, and the remaining 10 are

@@ -651,8 +655,15 @@
 #define REG_F2         f23
 #define REG_F3         f24
 #define REG_F4         f25
 #define REG_F2         f23
 #define REG_F3         f24
 #define REG_F4         f25

+
+/* for each of the double arg regs, 
+   Dn_2 is the high half. */
+   

 #define REG_D1         f2
 #define REG_D1         f2

+#define REG_D1_2       f3
+

 #define REG_D2         f4
 #define REG_D2         f4

+#define REG_D2_2       f5

 
 #define REG_Sp         i0
 #define REG_SpLim      i2
 
 #define REG_Sp         i0
 #define REG_SpLim      i2