Support MO_WriteBarrier in PowerPC NCG (lwsync instruction)

[ghc-hetmet.git] / compiler / nativeGen / MachInstrs.hs

diff --git a/compiler/nativeGen/MachInstrs.hs b/compiler/nativeGen/MachInstrs.hs
index baac1cd..9c0e71c 100644 (file)
--- a/compiler/nativeGen/MachInstrs.hs
+++ b/compiler/nativeGen/MachInstrs.hs
@@ -719,4 +719,5 @@ fPair other = pprPanic "fPair(sparc NCG)" (ppr other)
              | FETCHPC Reg            -- pseudo-instruction:
                                       -- bcl to next insn, mflr reg
              
+             | LWSYNC -- memory barrier
 #endif /* powerpc_TARGET_ARCH */