module RegAlloc.Linear.Base (
BlockAssignment,
+
Loc(..),
+ regsOfLoc,
-- for stats
SpillReason(..),
import RegAlloc.Linear.FreeRegs
import RegAlloc.Linear.StackMap
-
-import RegLiveness
-import MachRegs
+import RegAlloc.Liveness
+import Reg
import Outputable
import Unique
--
data Loc
-- | vreg is in a register
- = InReg {-# UNPACK #-} !RegNo
+ = InReg !RealReg
-- | vreg is held in a stack slot
- | InMem {-# UNPACK #-} !StackSlot
+ | InMem {-# UNPACK #-} !StackSlot
-- | vreg is held in both a register and a stack slot
- | InBoth {-# UNPACK #-} !RegNo
+ | InBoth !RealReg
{-# UNPACK #-} !StackSlot
deriving (Eq, Show, Ord)
ppr l = text (show l)
+-- | Get the reg numbers stored in this Loc.
+regsOfLoc :: Loc -> [RealReg]
+regsOfLoc (InReg r) = [r]
+regsOfLoc (InBoth r _) = [r]
+regsOfLoc (InMem _) = []
+
+
-- | Reasons why instructions might be inserted by the spiller.
-- Used when generating stats for -ddrop-asm-stats.
--
data RA_State
= RA_State
+ {
-- | the current mapping from basic blocks to
-- the register assignments at the beginning of that block.
- { ra_blockassig :: BlockAssignment
+ ra_blockassig :: BlockAssignment
-- | free machine registers
, ra_freeregs :: {-#UNPACK#-}!FreeRegs