%
-% (c) The AQUA Project, Glasgow University, 1993-1996
+% (c) The AQUA Project, Glasgow University, 1993-1998
%
\begin{code}
import AsmRegAlloc ( runRegAllocate )
import OrdList ( OrdList )
import PrimOp ( commutableOp, PrimOp(..) )
-import PrimRep ( PrimRep{-instance Eq-} )
import RegAllocInfo ( mkMRegsState, MRegsState )
-import Stix ( StixTree(..), StixReg(..), CodeSegment )
-import UniqSupply ( returnUs, thenUs, mapUs, UniqSM, UniqSupply )
+import Stix ( StixTree(..), StixReg(..) )
+import UniqSupply ( returnUs, thenUs, mapUs, initUs, UniqSM, UniqSupply )
import Outputable
\end{code}
\begin{code}
writeRealAsm :: Handle -> AbstractC -> UniqSupply -> IO ()
writeRealAsm handle absC us
- = _scc_ "writeRealAsm" (printForAsm handle (runNCG absC us))
+ = -- _scc_ "writeRealAsm"
+ printForAsm handle (initUs us (runNCG absC))
dumpRealAsm :: AbstractC -> UniqSupply -> SDoc
-dumpRealAsm = runNCG
+dumpRealAsm absC us = initUs us (runNCG absC)
runNCG absC
= genCodeAbstractC absC `thenUs` \ treelists ->