[project @ 2000-01-26 13:40:54 by sewardj]

[ghc-hetmet.git] / ghc / compiler / nativeGen / AsmCodeGen.lhs

diff --git a/ghc/compiler/nativeGen/AsmCodeGen.lhs b/ghc/compiler/nativeGen/AsmCodeGen.lhs
index 1e297ad..7da3a0b 100644 (file)
--- a/ghc/compiler/nativeGen/AsmCodeGen.lhs
+++ b/ghc/compiler/nativeGen/AsmCodeGen.lhs
@@ -3,11 +3,13 @@
 %
 
 \begin{code}
-module AsmCodeGen ( writeRealAsm, dumpRealAsm ) where
+module AsmCodeGen ( nativeCodeGen ) where
 
 #include "HsVersions.h"
+#include "nativeGen/NCG.h"
 
 import IO              ( Handle )
+import List            ( intersperse )
 
 import MachMisc
 import MachRegs
@@ -20,9 +22,15 @@ import AsmRegAlloc   ( runRegAllocate )
 import OrdList         ( OrdList )
 import PrimOp          ( commutableOp, PrimOp(..) )
 import RegAllocInfo    ( mkMRegsState, MRegsState )
-import Stix            ( StixTree(..), StixReg(..) )
-import UniqSupply      ( returnUs, thenUs, mapUs, initUs, UniqSM, UniqSupply )
+import Stix            ( StixTree(..), StixReg(..), pprStixTrees )
+import PrimRep         ( isFloatingRep )
+import UniqSupply      ( returnUs, thenUs, mapUs, initUs, 
+                          initUs_, UniqSM, UniqSupply )
+import UniqFM          ( UniqFM, emptyUFM, addToUFM, lookupUFM )
+import MachMisc                ( IF_ARCH_i386(i386_insert_ffrees,) )
+
 import Outputable      
+
 \end{code}
 
 The 96/03 native-code generator has machine-independent and
@@ -71,33 +79,36 @@ The machine-dependent bits break down as follows:
 \end{description}
 
 So, here we go:
-\begin{code}
-writeRealAsm :: Handle -> AbstractC -> UniqSupply -> IO ()
-writeRealAsm handle absC us
-  = -- _scc_ "writeRealAsm" 
-    printForAsm handle (initUs us (runNCG absC))
-
-dumpRealAsm :: AbstractC -> UniqSupply -> SDoc
-dumpRealAsm absC us = initUs us (runNCG absC)
 
-runNCG absC
-  = genCodeAbstractC absC      `thenUs` \ treelists ->
-    let
-       stix = map (map genericOpt) treelists
-    in
-    codeGen stix
+\begin{code}
+nativeCodeGen :: AbstractC -> UniqSupply -> (SDoc, SDoc)
+nativeCodeGen absC us
+   = let (stixRaw, us1) = initUs us (genCodeAbstractC absC)
+         stixOpt        = map (map genericOpt) stixRaw
+         insns          = initUs_ us1 (codeGen stixOpt)
+         debug_stix     = vcat (map pprStixTrees stixOpt)
+     in 
+         (debug_stix, insns)
 \end{code}
 
 @codeGen@ is the top-level code-generation function:
 \begin{code}
 codeGen :: [[StixTree]] -> UniqSM SDoc
 
-codeGen trees
-  = mapUs genMachCode trees    `thenUs` \ dynamic_codes ->
+codeGen stixFinal
+  = mapUs genMachCode stixFinal        `thenUs` \ dynamic_codes ->
     let
-       static_instrs = scheduleMachCode dynamic_codes
+        fp_kludge :: [Instr] -> [Instr]
+        fp_kludge = IF_ARCH_i386(i386_insert_ffrees,id)
+
+        static_instrss :: [[Instr]]
+       static_instrss = map fp_kludge (scheduleMachCode dynamic_codes)
+        docs           = map (vcat . map pprInstr) static_instrss       
     in
-    returnUs (vcat (map pprInstr static_instrs))
+    returnUs (vcat (intersperse (char ' ' 
+                                 $$ text "# ___stg_split_marker" 
+                                 $$ char ' ') 
+                    docs))
 \end{code}
 
 Top level code generator for a chunk of stix code:
@@ -115,10 +126,10 @@ exposed via the OrdList, but more might occur, so further analysis
 might be needed.
 
 \begin{code}
-scheduleMachCode :: [InstrList] -> [Instr]
+scheduleMachCode :: [InstrList] -> [[Instr]]
 
 scheduleMachCode
-  = concat . map (runRegAllocate freeRegsState reservedRegs)
+  = map (runRegAllocate freeRegsState reservedRegs)
   where
     freeRegsState = mkMRegsState (extractMappedRegNos freeRegs)
 \end{code}
@@ -202,7 +213,6 @@ primOpt
 primOpt op arg@[StInt x]
   = case op of
        IntNegOp -> StInt (-x)
-       IntAbsOp -> StInt (abs x)
        _ -> StPrim op arg
 
 primOpt op args@[StInt x, StInt y]