[project @ 2003-06-03 09:37:14 by ross]

[ghc-hetmet.git] / ghc / compiler / nativeGen / MachMisc.lhs

diff --git a/ghc/compiler/nativeGen/MachMisc.lhs b/ghc/compiler/nativeGen/MachMisc.lhs
index a51a607..0508888 100644 (file)
--- a/ghc/compiler/nativeGen/MachMisc.lhs
+++ b/ghc/compiler/nativeGen/MachMisc.lhs
@@ -76,11 +76,11 @@ underscorePrefix = (cLeadingUnderscore == "YES")
 fmtAsmLbl :: String -> String  -- for formatting labels
 
 fmtAsmLbl s
-  =  IF_ARCH_alpha(
      {- The alpha assembler likes temporary labels to look like $L123
        instead of L123.  (Don't toss the L, because then Lf28
        turns into $f28.)
      -}
+  =  IF_ARCH_alpha(
      '$' : s
      ,{-otherwise-}
      '.':'L':s
@@ -724,24 +724,24 @@ fPair other = pprPanic "fPair(sparc NCG)" (ppr other)
 
 -- Loads and stores.
 
-             | LD      Size Reg MachRegsAddr -- size, dst, src
-             | ST      Size Reg MachRegsAddr -- size, src, dst 
-             | STU     Size Reg MachRegsAddr -- size, src, dst 
-             | LIS     Reg Imm -- dst, src
-             | LI      Reg Imm -- dst, src
-             | MR      Reg Reg -- dst, src -- also for fmr
+             | LD      Size Reg MachRegsAddr -- Load size, dst, src
+             | ST      Size Reg MachRegsAddr -- Store size, src, dst 
+             | STU     Size Reg MachRegsAddr -- Store with Update size, src, dst 
+             | LIS     Reg Imm -- Load Immediate Shifted dst, src
+             | LI      Reg Imm -- Load Immediate dst, src
+             | MR      Reg Reg -- Move Register dst, src -- also for fmr
              
              | CMP     Size Reg RI --- size, src1, src2
              | CMPL    Size Reg RI --- size, src1, src2
              
              | BCC     Cond CLabel
              | MTCTR   Reg
-             | BCTR
+             | BCTR    DestInfo
              | BL      Imm [Reg]       -- with list of argument regs
              | BCTRL   [Reg]
              
              | ADD     Reg Reg RI -- dst, src1, src2    
-             | SUBF    Reg Reg RI -- dst, src1, src2    
+             | SUBF    Reg Reg Reg -- dst, src1, src2 ; dst = src2 - src1  
              | MULLW   Reg Reg RI
              | DIVW    Reg Reg Reg
              | DIVWU   Reg Reg Reg
@@ -749,21 +749,26 @@ fPair other = pprPanic "fPair(sparc NCG)" (ppr other)
              | AND     Reg Reg RI -- dst, src1, src2
              | OR      Reg Reg RI -- dst, src1, src2
              | XOR     Reg Reg RI -- dst, src1, src2
+             | XORIS   Reg Reg Imm -- XOR Immediate Shifted dst, src1, src2
              
              | NEG     Reg Reg
              | NOT     Reg Reg
              
-             | SLW     Reg Reg RI
-             | SRW     Reg Reg RI
-             | SRAW    Reg Reg RI
+             | SLW     Reg Reg RI      -- shift left word
+             | SRW     Reg Reg RI      -- shift right word
+             | SRAW    Reg Reg RI      -- shift right arithmetic word
              
              | FADD    Size Reg Reg Reg
              | FSUB    Size Reg Reg Reg
              | FMUL    Size Reg Reg Reg
              | FDIV    Size Reg Reg Reg
+             | FNEG    Reg Reg  -- negate is the same for single and double prec.
              
              | FCMP    Reg Reg
              
+             | FCTIWZ  Reg Reg         -- convert to integer word
+                                       -- (but destination is a FP register)
+             
 data RI = RIReg Reg
        | RIImm Imm