IMP_Ubiq(){-uitous-}
IMPORT_DELOOPER(AbsCLoop) ( fixedHdrSizeInWords, varHdrSizeInWords ) -- paranoia
IMPORT_DELOOPER(NcgLoop) ( underscorePrefix, fmtAsmLbl ) -- paranoia
+IMPORT_1_3(Char(isDigit))
import AbsCSyn ( MagicId(..) )
import AbsCUtils ( magicIdPrimRep )
+import CLabel ( CLabel )
import CmdLineOpts ( opt_SccProfilingOn )
import Literal ( mkMachInt, Literal(..) )
import MachRegs ( stgReg, callerSaves, RegLoc(..),
- Imm(..), Reg(..), Addr
+ Imm(..), Reg(..)
+#if __GLASGOW_HASKELL__ >= 202
+ )
+import qualified MachRegs (Addr)
+#define MachRegsAddr MachRegs.Addr
+#else
+ , Addr(..)
)
+#define MachRegsAddr Addr
+#endif
+
import OrdList ( OrdList )
import PrimRep ( PrimRep(..) )
import SMRep ( SMRep(..), SMSpecRepKind(..), SMUpdateKind(..) )
,{-else-} IF_ARCH_i386(
IF_OS_linuxaout(True
, IF_OS_freebsd(True
+ , IF_OS_cygwin32(True
, IF_OS_bsdi(True
, {-otherwise-} False)))
+ )
,{-else-}IF_ARCH_sparc(
IF_OS_sunos4(True, {-otherwise-} False)
,)))
---------------------------
cvtLitLit :: String -> String
--- ToDo: some kind of *careful* attention needed...
-
+--
+-- Rather than relying on guessing, use FILE_SIZE to compute the
+-- _iob offsets.
+--
cvtLitLit "stdin" = IF_ARCH_alpha("_iob+0" {-probably OK...-}
,IF_ARCH_i386("_IO_stdin_"
,IF_ARCH_sparc("__iob+0x0"{-probably OK...-}
,)))
+
+cvtLitLit "stdout" = IF_ARCH_alpha("_iob+"++show (``FILE_SIZE''::Int)
+ ,IF_ARCH_i386("_IO_stdout_"
+ ,IF_ARCH_sparc("__iob+"++show (``FILE_SIZE''::Int)
+ ,)))
+cvtLitLit "stderr" = IF_ARCH_alpha("_iob+"++show (2*(``FILE_SIZE''::Int))
+ ,IF_ARCH_i386("_IO_stderr_"
+ ,IF_ARCH_sparc("__iob+"++show (2*(``FILE_SIZE''::Int))
+ ,)))
+{-
cvtLitLit "stdout" = IF_ARCH_alpha("_iob+56"{-dodgy *at best*...-}
,IF_ARCH_i386("_IO_stdout_"
- ,IF_ARCH_sparc("__iob+0x14"{-dodgy *at best*...-}
+ ,IF_ARCH_sparc("__iob+0x10"{-dodgy *at best*...-}
,)))
cvtLitLit "stderr" = IF_ARCH_alpha("_iob+112"{-dodgy *at best*...-}
,IF_ARCH_i386("_IO_stderr_"
- ,IF_ARCH_sparc("__iob+0x28"{-dodgy *at best*...-}
+ ,IF_ARCH_sparc("__iob+0x20"{-dodgy *at best*...-}
,)))
+-}
cvtLitLit s
| isHex s = s
| otherwise = error ("Native code generator can't handle ``" ++ s ++ "''")
data Cond
#if alpha_TARGET_ARCH
= ALWAYS -- For BI (same as BR)
- | EQ -- For CMP and BI
+ | EQQ -- For CMP and BI (NB: "EQ" is a 1.3 Prelude name)
| GE -- For BI only
- | GT -- For BI only
+ | GTT -- For BI only (NB: "GT" is a 1.3 Prelude name)
| LE -- For CMP and BI
- | LT -- For CMP and BI
+ | LTT -- For CMP and BI (NB: "LT" is a 1.3 Prelude name)
| NE -- For BI only
| NEVER -- For BI (null instruction)
| ULE -- For CMP only
#endif
#if i386_TARGET_ARCH
= ALWAYS -- What's really used? ToDo
- | EQ
+ | EQQ
| GE
| GEU
- | GT
+ | GTT
| GU
| LE
| LEU
- | LT
+ | LTT
| LU
| NE
| NEG
#endif
#if sparc_TARGET_ARCH
= ALWAYS -- What's really used? ToDo
- | EQ
+ | EQQ
| GE
| GEU
- | GT
+ | GTT
| GU
| LE
| LEU
- | LT
+ | LTT
| LU
| NE
| NEG
-- Loads and stores.
- | LD Size Reg Addr -- size, dst, src
- | LDA Reg Addr -- dst, src
- | LDAH Reg Addr -- dst, src
- | LDGP Reg Addr -- dst, src
+ | LD Size Reg MachRegsAddr -- size, dst, src
+ | LDA Reg MachRegsAddr -- dst, src
+ | LDAH Reg MachRegsAddr -- dst, src
+ | LDGP Reg MachRegsAddr -- dst, src
| LDI Size Reg Imm -- size, dst, src
- | ST Size Reg Addr -- size, src, dst
+ | ST Size Reg MachRegsAddr -- size, src, dst
-- Int Arithmetic.
| BI Cond Reg Imm
| BF Cond Reg Imm
| BR Imm
- | JMP Reg Addr Int
+ | JMP Reg MachRegsAddr Int
| BSR Imm Int
- | JSR Reg Addr Int
+ | JSR Reg MachRegsAddr Int
-- Alpha-specific pseudo-ops.
| FABS
| FADD Size Operand -- src
| FADDP
- | FIADD Size Addr -- src
+ | FIADD Size MachRegsAddr -- src
| FCHS
| FCOM Size Operand -- src
| FCOS
| FDIV Size Operand -- src
| FDIVP
- | FIDIV Size Addr -- src
+ | FIDIV Size MachRegsAddr -- src
| FDIVR Size Operand -- src
| FDIVRP
- | FIDIVR Size Addr -- src
- | FICOM Size Addr -- src
- | FILD Size Addr Reg -- src, dst
- | FIST Size Addr -- dst
+ | FIDIVR Size MachRegsAddr -- src
+ | FICOM Size MachRegsAddr -- src
+ | FILD Size MachRegsAddr Reg -- src, dst
+ | FIST Size MachRegsAddr -- dst
| FLD Size Operand -- src
| FLD1
| FLDZ
| FMUL Size Operand -- src
| FMULP
- | FIMUL Size Addr -- src
+ | FIMUL Size MachRegsAddr -- src
| FRNDINT
| FSIN
| FSQRT
| FSTP Size Operand -- dst
| FSUB Size Operand -- src
| FSUBP
- | FISUB Size Addr -- src
+ | FISUB Size MachRegsAddr -- src
| FSUBR Size Operand -- src
| FSUBRP
- | FISUBR Size Addr -- src
+ | FISUBR Size MachRegsAddr -- src
| FTST
| FCOMP Size Operand -- src
| FUCOMPP
| CLTD -- sign extend %eax into %edx:%eax
data Operand
- = OpReg Reg -- register
- | OpImm Imm -- immediate value
- | OpAddr Addr -- memory reference
+ = OpReg Reg -- register
+ | OpImm Imm -- immediate value
+ | OpAddr MachRegsAddr -- memory reference
#endif {- i386_TARGET_ARCH -}
\end{code}
-- Loads and stores.
- | LD Size Addr Reg -- size, src, dst
- | ST Size Reg Addr -- size, src, dst
+ | LD Size MachRegsAddr Reg -- size, src, dst
+ | ST Size Reg MachRegsAddr -- size, src, dst
-- Int Arithmetic.
| BI Cond Bool Imm -- cond, annul?, target
| BF Cond Bool Imm -- cond, annul?, target
- | JMP Addr -- target
+ | JMP MachRegsAddr -- target
| CALL Imm Int Bool -- target, args, terminal
data RI = RIReg Reg
projects / ghc-hetmet.git / blobdiff