Reg(..),
Imm(..),
- Addr(..),
+ Address(..),
RegLoc(..),
SYN_IE(RegNo),
#endif
) where
+#if __GLASGOW_HASKELL__ >= 202
+import GlaExts
+import FastString
+#else
IMP_Ubiq(){-uitous-}
+#endif
import AbsCSyn ( MagicId(..) )
import AbsCUtils ( magicIdPrimRep )
-import Pretty ( ppStr, ppRational, ppShow )
+import CLabel ( CLabel )
+import Outputable ( Outputable(..) )
+import Pretty ( Doc, text, rational )
import PrimOp ( PrimOp(..) )
import PrimRep ( PrimRep(..) )
import Stix ( sStLitLbl, StixTree(..), StixReg(..),
CodeSegment
)
import Unique ( mkPseudoUnique1, mkPseudoUnique2, mkPseudoUnique3,
- Unique{-instance Ord3-}
+ Unique{-instance Ord3-}, Uniquable(..)
)
import UniqSupply ( getUnique, returnUs, thenUs, SYN_IE(UniqSM) )
-import Unpretty ( uppStr, SYN_IE(Unpretty) )
-import Util ( panic )
+import Util ( panic, Ord3(..) )
\end{code}
% - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
= ImmInt Int
| ImmInteger Integer -- Sigh.
| ImmCLbl CLabel -- AbstractC Label (with baggage)
- | ImmLab Unpretty -- Simple string label (underscore-able)
- | ImmLit Unpretty -- Simple string
+ | ImmLab Doc -- Simple string label (underscore-able)
+ | ImmLit Doc -- Simple string
IF_ARCH_sparc(
| LO Imm -- Possible restrictions...
| HI Imm
,)
-
-strImmLit s = ImmLit (uppStr s)
+strImmLit s = ImmLit (text s)
dblImmLit r
= strImmLit (
IF_ARCH_alpha({-prepend nothing-}
,IF_ARCH_i386( '0' : 'd' :
,IF_ARCH_sparc('0' : 'r' :,)))
- ppShow 80 (ppRational r))
+ show (rational r))
\end{code}
% - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
\begin{code}
-data Addr
+data Address
#if alpha_TARGET_ARCH
= AddrImm Imm
| AddrReg Reg
#endif
#if i386_TARGET_ARCH
- = Addr Base Index Displacement
+ = Address Base Index Displacement
| ImmAddr Imm Int
type Base = Maybe Reg
| AddrRegImm Reg Imm
#endif
-addrOffset :: Addr -> Int -> Maybe Addr
+addrOffset :: Address -> Int -> Maybe Address
addrOffset addr off
= case addr of
_ -> panic "MachMisc.addrOffset not defined for Alpha"
#endif
#if i386_TARGET_ARCH
- ImmAddr i off0 -> Just (ImmAddr i (off0 + off))
- Addr r i (ImmInt n) -> Just (Addr r i (ImmInt (n + off)))
- Addr r i (ImmInteger n)
- -> Just (Addr r i (ImmInt (fromInteger (n + toInteger off))))
+ ImmAddr i off0 -> Just (ImmAddr i (off0 + off))
+ Address r i (ImmInt n) -> Just (Address r i (ImmInt (n + off)))
+ Address r i (ImmInteger n)
+ -> Just (Address r i (ImmInt (fromInteger (n + toInteger off))))
_ -> Nothing
#endif
#if sparc_TARGET_ARCH
BaseReg -> sStLitLbl SLIT("MainRegTable")
-- these Hp&HpLim cases perhaps should
-- not be here for i386 (???) WDP 96/03
+#ifndef i386_TARGET_ARCH
+ -- Yup, Hp&HpLim are not mapped into registers for x86's at the mo, so
+ -- fetching Hp off BaseReg is the sensible option, since that's
+ -- where gcc generated code stuffs/expects it (RTBL_Hp & RTBL_HpLim).
+ -- SOF 97/09
+ -- In fact, why use StorageMgrInfo at all?
Hp -> StInd PtrRep (sStLitLbl SLIT("StorageMgrInfo"))
HpLim -> StInd PtrRep (sStLitLbl
(_PK_ ("StorageMgrInfo+" ++ BYTES_PER_WORD_STR)))
+#endif
TagReg -> StInd IntRep (StPrim IntSubOp [infoptr,
StInt (1*BYTES_PER_WORD)])
where
\begin{code}
spRel :: Int -- desired stack offset in words, positive or negative
- -> Addr
+ -> Address
spRel n
#if i386_TARGET_ARCH
- = Addr (Just esp) Nothing (ImmInt (n * BYTES_PER_WORD))
+ = Address (Just esp) Nothing (ImmInt (n * BYTES_PER_WORD))
#else
= AddrRegImm sp (ImmInt (n * BYTES_PER_WORD))
#endif
#if sparc_TARGET_ARCH
-fpRel :: Int -> Addr
+fpRel :: Int -> Address
-- Duznae work for offsets greater than 13 bits; we just hope for
-- the best
fpRel n
| UnmappedReg Unique PrimRep -- One of an infinite supply of registers,
-- always mapped to one of the earlier
-- two (?) before we're done.
-
mkReg :: Unique -> PrimRep -> Reg
mkReg = UnmappedReg
#ifdef DEBUG
instance Outputable Reg where
- ppr sty r = ppStr (show r)
+ ppr sty r = text (show r)
#endif
cmpReg (FixedReg i) (FixedReg i') = cmp_ihash i i'