[project @ 2003-12-10 11:35:24 by wolfgang]

[ghc-hetmet.git] / ghc / compiler / nativeGen / MachRegs.lhs

diff --git a/ghc/compiler/nativeGen/MachRegs.lhs b/ghc/compiler/nativeGen/MachRegs.lhs
index 20a1120..b7c1680 100644 (file)
--- a/ghc/compiler/nativeGen/MachRegs.lhs
+++ b/ghc/compiler/nativeGen/MachRegs.lhs
@@ -63,11 +63,10 @@ module MachRegs (
 
 import AbsCSyn         ( MagicId(..) )
 import CLabel           ( CLabel, mkMainCapabilityLabel )
-import MachOp          ( MachOp(..) )
 import PrimRep         ( PrimRep(..), isFloatingRep )
 import Stix            ( StixExpr(..), StixReg(..),
                           getUniqueNat, returnNat, thenNat, NatM )
-import Unique          ( mkPseudoUnique2, Uniquable(..), Unique )
+import Unique          ( Unique )
 import Pretty
 import Outputable      ( Outputable(..), pprPanic, panic )
 import qualified Outputable
@@ -88,12 +87,12 @@ data Imm
   | ImmFloat   Rational
   | ImmDouble  Rational
   IF_ARCH_sparc(
-  | LO Imm                 -- Possible restrictions...
+  | LO Imm                 {- Possible restrictions... -}
   | HI Imm
   ,IF_ARCH_powerpc(
   | LO Imm
   | HI Imm
-  | HA Imm     -- high halfword adjusted
+  | HA Imm     {- high halfword adjusted -}
   ,))
 strImmLit s = ImmLit (text s)
 \end{code}
@@ -158,7 +157,7 @@ addrOffset addr off
        
       _ -> Nothing
 
-#endif {-sparc-}
+#endif /* sparc */
 #if powerpc_TARGET_ARCH
       AddrRegImm r (ImmInt n)
        | fits16Bits n2 -> Just (AddrRegImm r (ImmInt n2))
@@ -175,7 +174,7 @@ addrOffset addr off
        | otherwise     -> Nothing
        
       _ -> Nothing
-#endif {-powerpc-}
+#endif /* powerpc */
 
 -----------------
 #if alpha_TARGET_ARCH
@@ -197,7 +196,7 @@ largeOffsetError i
            ++show i++");\nprobably because of large constant data structures;" ++ 
            "\nworkaround: use -fvia-C on this module.\n")
 
-#endif {-sparc-}
+#endif /* sparc */
 
 #if powerpc_TARGET_ARCH
 fits16Bits :: Integral a => a -> Bool
@@ -727,6 +726,8 @@ names in the header files.  Gag me with a spoon, eh?
 #define r29 29
 #define r30 30
 #define r31 31
+
+#ifdef darwin_TARGET_OS
 #define f0  32
 #define f1  33
 #define f2  34
@@ -759,6 +760,40 @@ names in the header files.  Gag me with a spoon, eh?
 #define f29 61
 #define f30 62
 #define f31 63
+#else
+#define fr0  32
+#define fr1  33
+#define fr2  34
+#define fr3  35
+#define fr4  36
+#define fr5  37
+#define fr6  38
+#define fr7  39
+#define fr8  40
+#define fr9  41
+#define fr10 42
+#define fr11 43
+#define fr12 44
+#define fr13 45
+#define fr14 46
+#define fr15 47
+#define fr16 48
+#define fr17 49
+#define fr18 50
+#define fr19 51
+#define fr20 52
+#define fr21 53
+#define fr22 54
+#define fr23 55
+#define fr24 56
+#define fr25 57
+#define fr26 58
+#define fr27 59
+#define fr28 60
+#define fr29 61
+#define fr30 62
+#define fr31 63
+#endif
 #endif
 \end{code}
 
@@ -983,21 +1018,21 @@ callClobberedRegs
      fReg 0, fReg 1, fReg 10, fReg 11, fReg 12, fReg 13, fReg 14, fReg 15,
      fReg 16, fReg 17, fReg 18, fReg 19, fReg 20, fReg 21, fReg 22, fReg 23,
      fReg 24, fReg 25, fReg 26, fReg 27, fReg 28, fReg 29, fReg 30]
-#endif {- alpha_TARGET_ARCH -}
+#endif /* alpha_TARGET_ARCH */
 #if i386_TARGET_ARCH
     -- caller-saves registers
     map RealReg [eax,ecx,edx,fake0,fake1,fake2,fake3,fake4,fake5]
-#endif {- i386_TARGET_ARCH -}
+#endif /* i386_TARGET_ARCH */
 #if sparc_TARGET_ARCH
     map RealReg 
         ( oReg 7 :
           [oReg i | i <- [0..5]] ++
           [gReg i | i <- [1..7]] ++
           [fReg i | i <- [0..31]] )
-#endif {- sparc_TARGET_ARCH -}
+#endif /* sparc_TARGET_ARCH */
 #if powerpc_TARGET_ARCH
     map RealReg ([0..12] ++ map fReg [0..13])
-#endif {- powerpc_TARGET_ARCH -}
+#endif /* powerpc_TARGET_ARCH */
 
 -------------------------------
 -- argRegs is the set of regs which are read for an n-argument call to C.
@@ -1019,7 +1054,7 @@ argRegs 4 = freeMappedRegs [16, 17, 18, 19, fReg 16, fReg 17, fReg 18, fReg 19]
 argRegs 5 = freeMappedRegs [16, 17, 18, 19, 20, fReg 16, fReg 17, fReg 18, fReg 19, fReg 20]
 argRegs 6 = freeMappedRegs [16, 17, 18, 19, 20, 21, fReg 16, fReg 17, fReg 18, fReg 19, fReg 20, fReg 21]
 argRegs _ = panic "MachRegs.argRegs(alpha): don't know about >6 arguments!"
-#endif {- alpha_TARGET_ARCH -}
+#endif /* alpha_TARGET_ARCH */
 
 #if sparc_TARGET_ARCH
 argRegs 0 = []
@@ -1030,7 +1065,7 @@ argRegs 4 = map (RealReg . oReg) [0,1,2,3]
 argRegs 5 = map (RealReg . oReg) [0,1,2,3,4]
 argRegs 6 = map (RealReg . oReg) [0,1,2,3,4,5]
 argRegs _ = panic "MachRegs.argRegs(sparc): don't know about >6 arguments!"
-#endif {- sparc_TARGET_ARCH -}
+#endif /* sparc_TARGET_ARCH */
 
 #if powerpc_TARGET_ARCH
 argRegs 0 = []
@@ -1043,19 +1078,19 @@ argRegs 6 = map RealReg [3..8]
 argRegs 7 = map RealReg [3..9]
 argRegs 8 = map RealReg [3..10]
 argRegs _ = panic "MachRegs.argRegs(powerpc): don't know about >8 arguments!"
-#endif {- powerpc_TARGET_ARCH -}
+#endif /* powerpc_TARGET_ARCH */
 
 -------------------------------
 -- all of the arg regs ??
 #if alpha_TARGET_ARCH
 allArgRegs :: [(Reg, Reg)]
 allArgRegs = [(realReg i, realReg (fReg i)) | i <- [16..21]]
-#endif {- alpha_TARGET_ARCH -}
+#endif /* alpha_TARGET_ARCH */
 
 #if sparc_TARGET_ARCH
 allArgRegs :: [Reg]
 allArgRegs = map RealReg [oReg i | i <- [0..5]]
-#endif {- sparc_TARGET_ARCH -}
+#endif /* sparc_TARGET_ARCH */
 
 #if i386_TARGET_ARCH
 allArgRegs :: [Reg]
@@ -1067,7 +1102,7 @@ allArgRegs :: [Reg]
 allArgRegs = map RealReg [3..10]
 allFPArgRegs :: [Reg]
 allFPArgRegs = map (RealReg . fReg) [1..13]
-#endif {- powerpc_TARGET_ARCH -}
+#endif /* powerpc_TARGET_ARCH */
 \end{code}
 
 \begin{code}