regUsage,
FutureLive(..),
- RegAssignment(..),
- RegConflicts(..),
+ SYN_IE(RegAssignment),
+ SYN_IE(RegConflicts),
RegFuture(..),
RegHistory(..),
RegInfo(..),
regLiveness,
spillReg,
- RegSet(..),
+ SYN_IE(RegSet),
elementOfRegSet,
emptyRegSet,
isEmptyRegSet,
freeRegSet
) where
-import Ubiq{-uitous-}
+IMP_Ubiq(){-uitous-}
+IMPORT_1_3(List(partition))
import MachMisc
import MachRegs
-import MachCode ( InstrList(..) )
+import MachCode ( SYN_IE(InstrList) )
+import AbsCSyn ( MagicId )
import BitSet ( unitBS, mkBS, minusBS, unionBS, listBS, BitSet )
import CLabel ( pprCLabel_asm, CLabel{-instance Ord-} )
-import FiniteMap ( addToFM, lookupFM )
+import FiniteMap ( addToFM, lookupFM, FiniteMap )
import OrdList ( mkUnitList, OrdList )
import PrimRep ( PrimRep(..) )
import Stix ( StixTree, CodeSegment )