module RdrHsSyn (
RdrNameArithSeqInfo(..),
+ RdrNameBangType(..),
RdrNameBind(..),
RdrNameClassDecl(..),
RdrNameClassOpSig(..),
getRawExportees
) where
-import Ubiq
+IMP_Ubiq()
import HsSyn
-import Outputable ( ExportFlag(..) )
+import Name ( ExportFlag(..) )
\end{code}
\begin{code}
type RdrNameArithSeqInfo = ArithSeqInfo Fake Fake RdrName RdrNamePat
+type RdrNameBangType = BangType RdrName
type RdrNameBind = Bind Fake Fake RdrName RdrNamePat
type RdrNameClassDecl = ClassDecl Fake Fake RdrName RdrNamePat
type RdrNameClassOpSig = Sig RdrName
type RdrNameMonoType = MonoType RdrName
type RdrNamePat = InPat RdrName
type RdrNamePolyType = PolyType RdrName
-type RdrNameQual = Qual Fake Fake RdrName RdrNamePat
+type RdrNameQual = Qualifier Fake Fake RdrName RdrNamePat
type RdrNameSig = Sig RdrName
type RdrNameSpecInstSig = SpecInstSig RdrName
type RdrNameStmt = Stmt Fake Fake RdrName RdrNamePat