Improve error messsage when argument count varies

[ghc-hetmet.git] / ghc / includes / MachRegs.h

diff --git a/ghc/includes/MachRegs.h b/ghc/includes/MachRegs.h
index 83a633b..77efee1 100644 (file)
--- a/ghc/includes/MachRegs.h
+++ b/ghc/includes/MachRegs.h
@@ -1,5 +1,4 @@
 /* -----------------------------------------------------------------------------
- * $Id: MachRegs.h,v 1.20 2005/01/19 18:31:07 wolfgang Exp $
  *
  * (c) The GHC Team, 1998-1999
  *
@@ -27,6 +26,36 @@
  */
 #ifndef NO_REGS
 
+/* NOTE: when testing the platform in this file we must test either
+ * *_HOST_ARCH and *_TARGET_ARCH, depending on whether COMPILING_GHC
+ * is set.  This is because when we're compiling the RTS and HC code,
+ * the platform we're running on is the HOST, but when compiling GHC
+ * we want to know about the register mapping on the TARGET platform.
+ */
+#ifdef COMPILING_GHC
+#define alpha_REGS    alpha_TARGET_ARCH
+#define hppa1_1_REGS  hppa1_1_TARGET_ARCH
+#define i386_REGS     i386_TARGET_ARCH
+#define x86_64_REGS   x86_64_TARGET_ARCH
+#define m68k_REGS     m68k_TARGET_ARCH
+#define mips_REGS     (mipsel_TARGET_ARCH || mipseb_TARGET_ARCH)
+#define powerpc_REGS  (powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH || rs6000_TARGET_ARCH)
+#define ia64_REGS     ia64_TARGET_ARCH
+#define sparc_REGS    sparc_TARGET_ARCH
+#define darwin_REGS   darwin_TARGET_OS
+#else
+#define alpha_REGS    alpha_HOST_ARCH
+#define hppa1_1_REGS  hppa1_1_HOST_ARCH
+#define i386_REGS     i386_HOST_ARCH
+#define x86_64_REGS   x86_64_HOST_ARCH
+#define m68k_REGS     m68k_HOST_ARCH
+#define mips_REGS     (mipsel_HOST_ARCH || mipseb_HOST_ARCH)
+#define powerpc_REGS  (powerpc_HOST_ARCH || powerpc64_HOST_ARCH || rs6000_HOST_ARCH)
+#define ia64_REGS     ia64_HOST_ARCH
+#define sparc_REGS    sparc_HOST_ARCH
+#define darwin_REGS   darwin_HOST_OS
+#endif
+
 /* ----------------------------------------------------------------------------
    Caller saves and callee-saves regs.
    
@@ -82,7 +111,7 @@
    t12 $27     NCG_reserved
    -------------------------------------------------------------------------- */
 
-#if defined(alpha_TARGET_ARCH)
+#if alpha_REGS
 # define REG(x) __asm__("$" #x)
 
 #  define CALLER_SAVES_R2
@@ -123,7 +152,7 @@
 #  define NCG_Reserved_F1 f29
 #  define NCG_Reserved_F2 f30
 
-#endif /* alpha_TARGET_ARCH */
+#endif /* alpha_REGS */
 
 /* -----------------------------------------------------------------------------
    The HP-PA register mapping
@@ -146,7 +175,7 @@
    \tr{%fr8}--\tr{%fr11} are some available caller-save fl-pt registers.
    -------------------------------------------------------------------------- */
 
-#if hppa1_1_TARGET_ARCH
+#if hppa1_1_REGS
 
 #define REG(x) __asm__("%" #x)
 
@@ -201,7 +230,7 @@
    -------------------------------------------------------------------------- */
 
 
-#if i386_TARGET_ARCH
+#if i386_REGS
 
 #define REG(x) __asm__("%" #x)
 
@@ -235,23 +264,44 @@
                callee-saves
   %rax
   %rbx         YES
-  %rcx
-  %rdx         (seem to be used as arg regs on x86-64)
-  %rsi         (seem to be used as arg regs on x86-64)
-  %rdi         (seem to be used as arg regs on x86-64)
-  %rbp         YES
+  %rcx          arg reg, caller-saves
+  %rdx         arg reg, caller-saves
+  %rsi         arg reg, caller-saves
+  %rdi         arg reg, caller-saves
+  %rbp         YES (our *prime* register)
   %rsp         (unavailable - stack pointer)
-  %r8
-  %r9
-  %r10
-  %r11         
+  %r8           arg reg, caller-saves
+  %r9          arg reg, caller-saves
+  %r10          caller-saves
+  %r11         caller-saves
   %r12         YES
   %r13         YES
   %r14         YES
   %r15         YES
+
+  %xmm0-7       arg regs, caller-saves
+  %xmm8-15      caller-saves
+
+  A better reg mapping might be:
+
+      %rbp  Sp
+      %rbx  R1
+      %r8   R2
+      %r9   R3
+      %r10  R4
+      %r12  Hp
+      %r14  SpLim
+      %r15  HpLim
+      %xmm8-11   F1-F4
+      %xmm12-13  D1-D2
+
+  Use the caller-saves regs for Rn, because we don't always have to
+  save those (as opposed to Sp/Hp/SpLim etc. which always have to be
+  saved).
+
   --------------------------------------------------------------------------- */
 
-#if x86_64_TARGET_ARCH
+#if x86_64_REGS
 
 #define REG(x) __asm__("%" #x)
 
@@ -302,7 +352,7 @@
    \end{tabular}
    -------------------------------------------------------------------------- */
 
-#if m68k_TARGET_ARCH
+#if m68k_REGS
 
 #define REG(x) __asm__(#x)
 
@@ -344,7 +394,7 @@
    We can steal some, but we might have to save/restore around ccalls.
    -------------------------------------------------------------------------- */
 
-#if mipsel_TARGET_ARCH || mipseb_TARGET_ARCH
+#if mips_REGS
 
 #define REG(x) __asm__("$" #x)
 
@@ -414,7 +464,7 @@
    We can do the Whole Business with callee-save registers only!
    -------------------------------------------------------------------------- */
 
-#if powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH || rs6000_TARGET_ARCH
+#if powerpc_REGS
 
 #define REG(x) __asm__(#x)
 
@@ -427,7 +477,7 @@
 #define REG_R7         r20
 #define REG_R8         r21
 
-#ifdef darwin_TARGET_OS
+#if darwin_REGS
 
 #define REG_F1         f14
 #define REG_F2         f15
@@ -471,7 +521,7 @@
    \tr{f16-f32} are the callee-saved floating point registers.
    -------------------------------------------------------------------------- */
 
-#ifdef ia64_TARGET_ARCH
+#if ia64_REGS
 
 #define REG(x) __asm__(#x)
 
@@ -556,7 +606,7 @@
 
    -------------------------------------------------------------------------- */
 
-#if sparc_TARGET_ARCH
+#if sparc_REGS
 
 #define REG(x) __asm__("%" #x)
 
@@ -574,9 +624,7 @@
 #define REG_R3         l3
 #define REG_R4         l4
 #define REG_R5         l5
-#define REG_R6         l6
-#define REG_R7         l7
-#define REG_R8         i5
+#define REG_R6         i5
 
 #define REG_F1         f22
 #define REG_F2         f23