#ifndef MACHREGS_H
#define MACHREGS_H
-#if defined(__STG_GCC_REGS__) || defined(COMPILING_GHC)
+#if defined(__STG_GCC_REGS__) || defined(COMPILING_NCG)
#include "StgMachDeps.h"
%* *
%************************************************************************
-\tr{r13}--\tr{r31} are wonderful callee-save registers.
-\tr{r4}--\tr{r8}, \tr{r10}, and \tr{r11} are caller-save registers.
+0 system glue? (caller-save, volatile)
+1 SP (callee-save, non-volatile)
+2 RTOC (callee-save, non-volatile)
+3-10 args/return (caller-save, volatile)
+11,12 system glue? (caller-save, volatile)
+13-31 (callee-save, non-volatile)
-\tr{%fr14}--\tr{%fr31} are callee-save floating-point registers.
+f0 (caller-save, volatile)
+f1-f13 args/return (caller-save, volatile)
+f14-f31 (callee-save, non-volatile)
+
+\tr{13}--\tr{31} are wonderful callee-save registers.
+\tr{0}--\tr{12} are caller-save registers.
+
+\tr{%f14}--\tr{%f31} are callee-save floating-point registers.
I think we can do the Whole Business with callee-save registers only!
\begin{code}
-#if powerpc_TARGET_ARCH
+#if powerpc_TARGET_ARCH || rs6000_TARGET_ARCH
-#define REG(x) __asm__("%" #x)
+#define REG(x) __asm__(#x)
#if defined(MARK_REG_MAP)
-#define REG_Mark r13
-#define REG_MStack r14
-#define REG_MRoot r15
-#define REG_BitArray r16
-#define REG_HeapBase r17
-#define REG_HeapLim r18
+#define REG_Mark r22
+#define REG_MStack r23
+#define REG_MRoot r24
+#define REG_BitArray r25
+#define REG_HeapBase r26
+#define REG_HeapLim r27
#else
#if defined(SCAN_REG_MAP)
-#define REG_Scan r13
-#define REG_New r14
-#define REG_LinkLim r15
+#define REG_Scan r22
+#define REG_New r23
+#define REG_LinkLim r24
#else
#if defined(SCAV_REG_MAP)
-#define REG_Scav r13
-#define REG_ToHp r14
+#define REG_Scav r22
+#define REG_ToHp r23
#if defined(GCap) || defined(GCgn)
-#define REG_OldGen r15
+#define REG_OldGen r24
#endif /* GCap || GCgn */
#else /* default: MAIN_REG_MAP */
#define CALLEE_SAVES_R7
#define CALLEE_SAVES_R8
-#define REG_R1 r13
-#define REG_R2 r14
-#define REG_R3 r15
-#define REG_R4 r16
-#define REG_R5 r17
-#define REG_R6 r18
-#define REG_R7 r19
-#define REG_R8 r20
+#define REG_R1 r14
+#define REG_R2 r15
+#define REG_R3 r16
+#define REG_R4 r17
+#define REG_R5 r18
+#define REG_R6 r19
+#define REG_R7 r20
+#define REG_R8 r21
#define REG_Flt1 fr14
#define REG_Flt2 fr15
#define REG_Dbl1 fr18
#define REG_Dbl2 fr19
-#define REG_SpA r21
-#define REG_SuA r22
-#define REG_SpB r23
-#define REG_SuB r24
+#define REG_SpA r22
+#define REG_SuA r23
+#define REG_SpB r24
+#define REG_SuB r25
-#define REG_Hp r25
-#define REG_HpLim r26
+#define REG_Hp r26
+#define REG_HpLim r27
-#define REG_Ret r27
+#define REG_Ret r28
-#define REG_StkStub r28
+#define REG_StkStub r29
#endif /* SCAV_REG_MAP */
#endif /* SCAN_REG_MAP */
Concluding multi-slurp protection:
\begin{code}
-#endif /* __STG_GCC_REGS__ || COMPILING_GHC */
+#endif /* __STG_GCC_REGS__ || COMPILING_NCG */
#endif /* MACHREGS_H */
\end{code}