[project @ 2004-11-10 04:17:50 by wolfgang]

[ghc-hetmet.git] / ghc / rts / StgCRun.c

diff --git a/ghc/rts/StgCRun.c b/ghc/rts/StgCRun.c
index 94ee2a5..db69424 100644 (file)
--- a/ghc/rts/StgCRun.c
+++ b/ghc/rts/StgCRun.c
@@ -1,5 +1,4 @@
 /* -----------------------------------------------------------------------------
- * $Id: StgCRun.c,v 1.40 2003/08/29 16:13:48 simonmar Exp $
  *
  * (c) The GHC Team, 1998-2003
  *
@@ -50,7 +49,7 @@
  * that we don't use but which are callee-save registers.  The __divq() routine
  * in libc.a clobbers $s6.
  */
-#include "config.h"
+#include "ghcconfig.h"
 #ifdef alpha_TARGET_ARCH
 #define alpha_EXTRA_CAREFUL
 register long   fake_ra __asm__("$26");
@@ -68,9 +67,11 @@ register double fake_f9 __asm__("$f9");
 #include "Stg.h"
 #include "Rts.h"
 #include "StgRun.h"
+#include "RtsFlags.h"
+#include "OSThreads.h"
+#include "Capability.h"
 
 #ifdef DEBUG
-#include "RtsFlags.h"
 #include "RtsUtils.h"
 #include "Printer.h"
 #endif
@@ -81,22 +82,22 @@ register double fake_f9 __asm__("$f9");
    any architecture (using miniinterpreter)
    -------------------------------------------------------------------------- */
 
-extern StgThreadReturnCode StgRun(StgFunPtr f, StgRegTable *basereg STG_UNUSED)
+StgThreadReturnCode StgRun(StgFunPtr f, StgRegTable *basereg STG_UNUSED)
 {
-   while (f) {
-      IF_DEBUG(interpreter,
-              fprintf(stderr,"Jumping to ");
-              printPtr((P_)f); fflush(stdout);
-              fprintf(stderr,"\n");
-             );
-      f = (StgFunPtr) (f)();
-   }
-   return (StgThreadReturnCode)R1.i;
+    while (f) {
+       if (RtsFlags[0].DebugFlags.interpreter) {
+           debugBelch("Jumping to ");
+           printPtr((P_)f); fflush(stdout);
+           debugBelch("\n");
+       }
+       f = (StgFunPtr) (f)();
+    }
+    return (StgThreadReturnCode)R1.i;
 }
 
-EXTFUN(StgReturn)
+StgFunPtr StgReturn(void)
 {
-   return 0;
+    return 0;
 }
 
 #else /* !USE_MINIINTERPRETER */
@@ -530,6 +531,7 @@ StgRun(StgFunPtr f, StgRegTable *basereg)
 
 extern StgThreadReturnCode StgRun(StgFunPtr f, StgRegTable *basereg);
 
+#ifdef darwin_TARGET_OS
 static void StgRunIsImplementedInAssembler(void)
 {
        __asm__ volatile (
@@ -539,6 +541,7 @@ static void StgRunIsImplementedInAssembler(void)
                "\tbl saveFP # f14\n"
                "\tstmw r13,-220(r1)\n"
                "\tstwu r1,-%0(r1)\n"
+                "\tmr r27,r4\n" // BaseReg == r27
                "\tmtctr r3\n"
                "\tmr r12,r3\n"
                "\tbctr\n"
@@ -550,6 +553,82 @@ static void StgRunIsImplementedInAssembler(void)
                "\tb restFP # f14\n"
        : : "i"(RESERVED_C_STACK_BYTES+288 /*stack frame size*/));
 }
+#else
+
+// This version is for PowerPC Linux.
+
+// Differences from the Darwin/Mac OS X version:
+// *) Different Assembler Syntax
+// *) Doesn't use Register Saving Helper Functions (although they exist somewhere)
+// *) We may not access positive stack offsets
+//    (no "Red Zone" as in the Darwin ABI)
+// *) The Link Register is saved to a different offset in the caller's stack frame
+//    (Linux: 4(r1), Darwin 8(r1))
+
+static void StgRunIsImplementedInAssembler(void)
+{
+       __asm__ volatile (
+               "\t.globl StgRun\n"
+               "\t.type StgRun,@function\n"
+               "StgRun:\n"
+               "\tmflr 0\n"
+               "\tstw 0,4(1)\n"
+               "\tmr 5,1\n"
+               "\tstwu 1,-%0(1)\n"
+               "\tstmw 13,-220(5)\n"
+               "\tstfd 14,-144(5)\n"
+               "\tstfd 15,-136(5)\n"
+               "\tstfd 16,-128(5)\n"
+               "\tstfd 17,-120(5)\n"
+               "\tstfd 18,-112(5)\n"
+               "\tstfd 19,-104(5)\n"
+               "\tstfd 20,-96(5)\n"
+               "\tstfd 21,-88(5)\n"
+               "\tstfd 22,-80(5)\n"
+               "\tstfd 23,-72(5)\n"
+               "\tstfd 24,-64(5)\n"
+               "\tstfd 25,-56(5)\n"
+               "\tstfd 26,-48(5)\n"
+               "\tstfd 27,-40(5)\n"
+               "\tstfd 28,-32(5)\n"
+               "\tstfd 29,-24(5)\n"
+               "\tstfd 30,-16(5)\n"
+               "\tstfd 31,-8(5)\n"
+               "\tmr 27,4\n"  // BaseReg == r27
+               "\tmtctr 3\n"
+               "\tmr 12,3\n"
+               "\tbctr\n"
+               ".globl StgReturn\n"
+               "\t.type StgReturn,@function\n"
+               "StgReturn:\n"
+               "\tmr 3,14\n"
+               "\tla 5,%0(1)\n"
+               "\tlmw 13,-220(5)\n"
+               "\tlfd 14,-144(5)\n"
+               "\tlfd 15,-136(5)\n"
+               "\tlfd 16,-128(5)\n"
+               "\tlfd 17,-120(5)\n"
+               "\tlfd 18,-112(5)\n"
+               "\tlfd 19,-104(5)\n"
+               "\tlfd 20,-96(5)\n"
+               "\tlfd 21,-88(5)\n"
+               "\tlfd 22,-80(5)\n"
+               "\tlfd 23,-72(5)\n"
+               "\tlfd 24,-64(5)\n"
+               "\tlfd 25,-56(5)\n"
+               "\tlfd 26,-48(5)\n"
+               "\tlfd 27,-40(5)\n"
+               "\tlfd 28,-32(5)\n"
+               "\tlfd 29,-24(5)\n"
+               "\tlfd 30,-16(5)\n"
+               "\tlfd 31,-8(5)\n"
+               "\tmr 1,5\n"
+               "\tlwz 0,4(1)\n"
+               "\tmtlr 0\n"
+               "\tblr\n"
+       : : "i"(RESERVED_C_STACK_BYTES+288 /*stack frame size*/));
+}
+#endif
 
 #endif