[project @ 2003-01-29 09:54:31 by simonmar]
[ghc-hetmet.git] / ghc / rts / StgCRun.c
index 3e16e48..f88f28e 100644 (file)
@@ -1,5 +1,5 @@
 /* -----------------------------------------------------------------------------
- * $Id: StgCRun.c,v 1.33 2002/05/21 14:58:49 wolfgang Exp $
+ * $Id: StgCRun.c,v 1.37 2002/12/11 15:36:51 simonmar Exp $
  *
  * (c) The GHC Team, 1998-2000
  *
@@ -84,7 +84,7 @@ register double fake_f9 __asm__("$f9");
 extern StgThreadReturnCode StgRun(StgFunPtr f, StgRegTable *basereg STG_UNUSED)
 {
    while (f) {
-      IF_DEBUG(evaluator,
+      IF_DEBUG(interpreter,
               fprintf(stderr,"Jumping to ");
               printPtr((P_)f); fflush(stdout);
               fprintf(stderr,"\n");
@@ -465,7 +465,7 @@ StgRun(StgFunPtr f, StgRegTable *basereg)
 
 extern StgThreadReturnCode StgRun(StgFunPtr f, StgRegTable *basereg);
 
-void StgRunIsImplementedInAssembler()
+static void StgRunIsImplementedInAssembler(void)
 {
        __asm__ volatile (
                "\n.globl _StgRun\n"
@@ -483,7 +483,65 @@ void StgRunIsImplementedInAssembler()
                "\tla r1,8480(r1)\n"
                "\tlmw r14,-216(r1)\n"
                "\tb restFP # f14\n"
-       );
+       );      /* RESERVED_C_STACK_BYTES + stack frame size == 8192 + 288 == 8480 */
+}
+
+#endif
+
+/* -----------------------------------------------------------------------------
+   IA64 architecture
+
+   Again, in assembler - so we can fiddle with the register stack, and because
+   gcc doesn't handle asm-clobbered callee-saves correctly.
+
+   loc0  - loc15: preserved locals
+   loc16 - loc28: STG registers
+           loc29: saved ar.pfs
+           loc30: saved b0
+   -------------------------------------------------------------------------- */
+
+#ifdef ia64_TARGET_ARCH
+
+/* the memory stack is rarely used, so 16K is excessive */
+#undef RESERVED_C_STACK_BYTES
+#define RESERVED_C_STACK_BYTES 1024
+
+static void StgRunIsImplementedInAssembler(void)
+{
+    __asm__ volatile(
+               ".global StgRun\n"
+               "StgRun:\n"
+               "\talloc loc29 = ar.pfs, 0, 31, 8, 0\n" /* setup register frame */
+               "\tld8 r18 = [r32],8\n"                 /* get procedure address */
+               "\tadds sp = -%0, sp ;;\n"              /* setup stack */
+               "\tld8 gp = [r32]\n"                    /* get procedure GP */
+               "\tadds r16 = %0-(6*16), sp\n"
+               "\tadds r17 = %0-(5*16), sp ;;\n"
+               "\tstf.spill [r16] = f16,32\n"          /* spill callee-saved fp regs */
+               "\tstf.spill [r17] = f17,32\n"
+               "\tmov b6 = r18 ;;\n"                   /* set target address */
+               "\tstf.spill [r16] = f18,32\n"
+               "\tstf.spill [r17] = f19,32\n"
+               "\tmov loc30 = b0 ;;\n"                 /* save return address */
+               "\tstf.spill [r16] = f20,32\n"
+               "\tstf.spill [r17] = f21,32\n"
+               "\tbr.few b6 ;;\n"                      /* branch to function */
+               ".global StgReturn\n"
+               "StgReturn:\n"
+               "\tmov r8 = loc16\n"            /* return value in r8 */
+               "\tadds r16 = %0-(6*16), sp\n"
+               "\tadds r17 = %0-(5*16), sp ;;\n"
+               "\tldf.fill f16 = [r16],32\n"   /* start restoring fp regs */
+               "\tldf.fill f17 = [r17],32\n"
+               "\tmov ar.pfs = loc29 ;;\n"     /* restore register frame */
+               "\tldf.fill f18 = [r16],32\n"
+               "\tldf.fill f19 = [r17],32\n"
+               "\tmov b0 = loc30 ;;\n"         /* restore return address */
+               "\tldf.fill f20 = [r16],32\n"
+               "\tldf.fill f21 = [r17],32\n"
+               "\tadds sp = %0, sp\n"          /* restore stack */
+               "\tbr.ret.sptk.many b0 ;;\n"    /* return */
+       : : "i"(RESERVED_C_STACK_BYTES + 6*16));
 }
 
 #endif