NCG: Use sync instead of msync for a memory barrier for powerpc

[ghc-hetmet.git] / includes / MachRegs.h

diff --git a/includes/MachRegs.h b/includes/MachRegs.h
index 92944e1..adc132b 100644 (file)
--- a/includes/MachRegs.h
+++ b/includes/MachRegs.h
@@ -397,10 +397,6 @@
 
 #define REG(x) __asm__("$" #x)
 
-#define CALLER_SAVES_R1
-#define CALLER_SAVES_R2
-#define CALLER_SAVES_R3
-#define CALLER_SAVES_R4
 #define CALLER_SAVES_R5
 #define CALLER_SAVES_R6
 #define CALLER_SAVES_R7
@@ -408,14 +404,14 @@
 
 #define CALLER_SAVES_USER
 
-#define REG_R1         9
-#define REG_R2         10
-#define REG_R3         11
-#define REG_R4         12
-#define REG_R5         13
-#define REG_R6         14
-#define REG_R7         15
-#define REG_R8         24
+#define REG_R1         16
+#define REG_R2         17
+#define REG_R3         18
+#define REG_R4         19
+#define REG_R5         12
+#define REG_R6         13
+#define REG_R7         14
+#define REG_R8         15
 
 #define REG_F1         f20
 #define REG_F2         f22
@@ -425,11 +421,13 @@
 #define REG_D1         f28
 #define REG_D2         f30
 
-#define REG_Sp         16
-#define REG_SpLim      18
+#define REG_Sp         20
+#define REG_SpLim      21
+
+#define REG_Hp         22
+#define REG_HpLim      23
 
-#define REG_Hp         19
-#define REG_HpLim      20
+#define REG_Base       30
 
 #endif /* mipse[lb] */
 
@@ -561,17 +559,49 @@
    output registers visible in one register window.  The 8 %g (global)
    registers are visible all the time.
    
-   %o0..%o7            not available; can be zapped by callee
-                         (%o6 is C-stack ptr; %o7 hold ret addrs)
-   %i0..%i7                    available (except %i6 is used as frame ptr)
-                         (and %i7 tends to have ret-addr-ish things)
-   %l0..%l7            available
-   %g0..%g4            not available; prone to stomping by division, etc.
-   %g5..%g7            not available; reserved for the OS
-
-   Note: %g3 is *definitely* clobbered in the builtin divide code (and
-   our save/restore machinery is NOT GOOD ENOUGH for that); discretion
-   being the better part of valor, we also don't take %g4.
+      zero: always zero
+   scratch: volatile across C-fn calls. used by linker.
+       app: usable by application
+    system: reserved for system
+ 
+     alloc: allocated to in the register allocator, intra-closure only
+   
+                GHC usage     v8 ABI        v9 ABI
+   Global
+     %g0       zero        zero          zero
+     %g1       alloc       scratch       scrach
+     %g2       alloc       app           app
+     %g3       alloc       app           app
+     %g4       alloc       app           scratch
+     %g5                    system        scratch    
+     %g6                    system        system
+     %g7                    system        system
+
+   Output: can be zapped by callee
+     %o0-o5    alloc       caller saves
+     %o6                    C stack ptr
+     %o7                    C ret addr
+   
+   Local: maintained by register windowing mechanism
+     %l0       alloc        
+     %l1       R1
+     %l2       R2
+     %l3       R3
+     %l4       R4
+     %l5       R5
+     %l6       alloc
+     %l7       alloc
+
+   Input
+     %i0       Sp
+     %i1        Base
+     %i2        SpLim
+     %i3        Hp
+     %i4        HpLim
+     %i5        R6
+     %i6                    C frame ptr
+     %i7                    C ret addr
+     
 
    The paired nature of the floating point registers causes complications for
    the native code generator.  For convenience, we pretend that the first 22
@@ -638,12 +668,16 @@
 #define REG_Hp         i3
 #define REG_HpLim      i4
 
+#define REG_Base       i1
+
+/*
 #define NCG_SpillTmp_I1        g1
 #define NCG_SpillTmp_I2        g2
 #define NCG_SpillTmp_F1        f26
 #define NCG_SpillTmp_F2 f27
 #define NCG_SpillTmp_D1        f6
 #define NCG_SpillTmp_D2        f8
+*/
 
 #define NCG_FirstFloatReg f22