--- /dev/null
+
+
+
+Expr =
+
+
+
+ram addr data we -> data ack =
+ clock => we ? data -> storage.data[addr]
+ :
+
+
+merge ( a b c ) =
+ a(x) => rega=x | a_ok
+ b(x) => regb=x | b_ok
+ a_ok & b_ok => c=x
+
+
+
+bit[32]
+{ alpha=
+
+
+X (datapath)
+Event-of-X (control)
+