X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;ds=sidebyside;f=chips%2Fmarina%2Felectric%2FredFive.delib%2FinvVn.sch;fp=chips%2Fmarina%2Felectric%2FredFive.delib%2FinvVn.sch;h=70ecc1a3f3091a0e9d7c6d80f44f6209ff7a4bf5;hb=8ae5f0096902dbf7a528382a45861c8c74693c40;hp=0000000000000000000000000000000000000000;hpb=4e6d6c048a89a60bade6508938706b729847cf95;p=fleet.git diff --git a/chips/marina/electric/redFive.delib/invVn.sch b/chips/marina/electric/redFive.delib/invVn.sch new file mode 100644 index 0000000..70ecc1a --- /dev/null +++ b/chips/marina/electric/redFive.delib/invVn.sch @@ -0,0 +1,37 @@ +HredFive|8.10k + +# External Libraries: + +LorangeTSMC090nm|orangeTSMC090nm + +# Cell invVn;1{sch} +CinvVn;1{sch}||schematic|1021415734000|1158010267102||ATTR_Delay(D5G1;HNPX-15.5;Y-7.5;)I100|ATTR_NPdrvR(D5FLeave alone;G1;HNOLPX-15.5;Y-6.5;)S1|ATTR_X(D5FLeave alone;G1;HNOLPX-15.5;Y-5.5;)S1|ATTR_drive0(D5G1;HNPTX-15.5;Y-8.5;)Sstrong0|ATTR_drive1(D5G1;HNPTX-15.5;Y-9.5;)Sstrong1|ATTR_verilog_template(D5G1;NTX18.5;Y-19.5;)Snot ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(in));|prototype_center()I[0,0] +IorangeTSMC090nm:NMOSx;1{ic}|NMOS@0||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@X*@NPdrvR +IorangeTSMC090nm:PMOSx;1{ic}|PMOS@0||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3;)S@X +Ngeneric:Facet-Center|art@0||0|0||||AV +NOff-Page|conn@0||7|0|||| +NOff-Page|conn@1||-12|0|||| +NGround|gnd@0||0|-12|||| +IinvVn;1{ic}|invVn@0||26.75|6|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-3;)I100|ATTR_NPdrvR(D5FLeave alone;G1;NOLPX2;Y-2;)S1|ATTR_X(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1 +Ngeneric:Invisible-Pin|pin@0||0.5|17.5|||||ART_message(D5G2;)S[variable ratio inverter] +Ngeneric:Invisible-Pin|pin@1||-0.5|22|||||ART_message(D5G6;)S[invVn] +NWire_Pin|pin@2||0|0|||| +NWire_Pin|pin@3||-5|0|||| +NWire_Pin|pin@4||-5|-6|||| +NWire_Pin|pin@5||-5|6|||| +Ngeneric:Invisible-Pin|pin@6||19.5|-15.5|||||ART_message(D5G2;)S[X is drive strength,"P drive strength is X, N drive strength is X*NPdrvR"] +Ngeneric:Invisible-Pin|pin@7||0.5|15.5|||||ART_message(D5G2;)S["PMOS sized normally, NMOS sized by ratio value"] +NPower|pwr@0||0|11|||| +Awire|net@0|||900|NMOS@0|s|0|-8|gnd@0||0|-10 +Awire|net@1|||2700|NMOS@0|d|0|-4|pin@2||0|0 +Awire|net@2|||1800|pin@4||-5|-6|NMOS@0|g|-3|-6 +Awire|net@3|||2700|PMOS@0|s|0|8|pwr@0||0|11 +Awire|net@4|||1800|pin@5||-5|6|PMOS@0|g|-3|6 +Awire|net@5|||2700|pin@2||0|0|PMOS@0|d|0|4 +Awire|net@6|||1800|pin@2||0|0|conn@0|a|5|0 +Awire|net@7|||0|pin@3||-5|0|conn@1|y|-10|0 +Awire|net@8|||2700|pin@4||-5|-6|pin@3||-5|0 +Awire|net@9|||2700|pin@3||-5|0|pin@5||-5|6 +Ein||D5G2;|conn@1|a|I +Eout||D5G2;|conn@0|y|O +X