X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;ds=sidebyside;f=ghc%2Fcompiler%2FnativeGen%2FMachMisc.lhs;h=e58821036a47b346d448f98487a0e8f0113a845d;hb=06e14415fa8aef5be7d01314d08fcd87873cd0da;hp=0508888ef095235adfb475becd13fc0932a652af;hpb=56af76cc6a264621bfd18071f21e6a608e691e47;p=ghc-hetmet.git

diff --git a/ghc/compiler/nativeGen/MachMisc.lhs b/ghc/compiler/nativeGen/MachMisc.lhs
index 0508888..e588210 100644
--- a/ghc/compiler/nativeGen/MachMisc.lhs
+++ b/ghc/compiler/nativeGen/MachMisc.lhs
@@ -429,7 +429,7 @@ data RI
   = RIReg Reg
   | RIImm Imm
 
-#endif {- alpha_TARGET_ARCH -}
+#endif /* alpha_TARGET_ARCH */
 \end{code}
 
 Intel, in their infinite wisdom, selected a stack model for floating
@@ -630,7 +630,7 @@ is_G_instr instr
         GFREE -> panic "is_G_instr: GFREE (!)"
         other -> False
 
-#endif {- i386_TARGET_ARCH -}
+#endif /* i386_TARGET_ARCH */
 \end{code}
 
 \begin{code}
@@ -715,7 +715,7 @@ moveSp n
 fPair :: Reg -> Reg
 fPair (RealReg n) | n >= 32 && n `mod` 2 == 0  = RealReg (n+1)
 fPair other = pprPanic "fPair(sparc NCG)" (ppr other)
-#endif {- sparc_TARGET_ARCH -}
+#endif /* sparc_TARGET_ARCH */
 \end{code}
 
 \begin{code}
@@ -783,6 +783,6 @@ condToSigned LU = LTT
 condToSigned GEU = GE
 condToSigned LEU = LE
 condToSigned x = x
-#endif {- powerpc_TARGET_ARCH -}
+#endif /* powerpc_TARGET_ARCH */
 \end{code}