X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=Makefile;h=cf1f3eb8a94f8dfb9d64988ee5f50ac27b93f94c;hb=6dbda4e4e80a6579447a0cc2aadfef9a4a5e9abd;hp=450e739ebf96707bf1928b016c3aff6784832f33;hpb=56553c511a9c2a6d110095ea7ca7c860fa7a31c5;p=fleet.git diff --git a/Makefile b/Makefile index 450e739..cf1f3eb 100644 --- a/Makefile +++ b/Makefile @@ -1,138 +1,491 @@ ## Fleeterpreter ############################################################################## -interpreter_class = edu.berkeley.fleet.interpreter.Main -cp = -cp fleet.jar +ifeq ($(impl),ml509) +java = java -Xmx500m -Dfleet.impl='edu.berkeley.fleet.fpga.ML509$$Large' +effort = high +opt_for = area +xil_ver=10.1 +remote_ise = /tools/xilinx/${xil_ver}/ISE +remote_edk = /tools/xilinx/${xil_ver}/EDK +speed_grade = 1 +part = xc5vlx110t +package = ff1136 +board = ml505 # ?? +runhost=goliath +else +ifeq ($(impl),bee2) +java = java -Xmx500m -Dfleet.impl=edu.berkeley.fleet.fpga.Bee2 +# BEE2 does not work with ISE 10.1 +xil_ver=9.1i +remote_ise = /tools/xilinx/ISE${xil_ver}_lin/ +remote_edk = /tools/xilinx/EDK${xil_ver}/ +effort = high +opt_for = area +part = xc2vp70 +package = ff1704 +speed_grade=6 +runhost=bee2-tunnel +else +ifeq ($(impl),java) +java = java -Xmx500m -Dfleet.impl=edu.berkeley.fleet.interpreter.Interpreter +else +ifeq ($(impl),small) +java = java -Xmx500m -Dfleet.impl='edu.berkeley.fleet.fpga.ML509$$Small' +effort = std +opt_for = area +xil_ver=10.1 +remote_ise = /tools/xilinx/${xil_ver}/ISE +remote_edk = /tools/xilinx/${xil_ver}/EDK +speed_grade = 1 +part = xc5vlx110t +package = ff1136 +board = ml505 # ?? +runhost=goliath +else java = java -Xmx500m +endif +endif +endif +endif + +cp = -cp fleet.jar:lib/RXTXcomm.jar run: fleet.jar; $(java) $(cp) $(interpreter_class) -fleet.jar: $(shell find src -name \*.java) $(shell find ships -name \*.ship) src/edu/berkeley/fleet/assembler/fleet.g +ifeq ($(shell uname -o 2>/dev/null),Cygwin) +ps=\; +else +ps=: +endif + +java_files = $(shell find src -name \*.java) +ship_files = $(shell find ships -name \*.ship) +fleet.jar: $(java_files) $(ship_files) src/edu/berkeley/fleet/assembler/fleet.g mkdir -p build/class/edu/berkeley/fleet/assembler/ cp src/edu/berkeley/fleet/assembler/fleet.g build/class/edu/berkeley/fleet/assembler/ - javac -cp lib/edu.berkeley.sbp.jar -d build/class/ $(shell find src -name \*.java) + javac -classpath lib/com.sun.async.test.jar:lib/ibex.jar:lib/RXTXcomm.jar:lib/edu.berkeley.sbp.jar -d build/class/ $(shell find src -name \*.java) cd build/class/; jar xf ../../lib/edu.berkeley.sbp.jar + cd build/class/; jar xf ../../lib/ibex.jar for A in `find ships -name \*.ship`;\ - do java -cp build/class edu.berkeley.fleet.Main expand $$A;\ + do java \ + -cp fleet.jar:build/class \ + -Dfleet.impl=edu.berkeley.fleet.interpreter.Interpreter \ + edu.berkeley.fleet.Main \ + expand $$A;\ done - javac -cp build/class:lib/edu.berkeley.sbp.jar -d build/class/ `find build/java -name \*.java` + javac -classpath lib/com.sun.async.test.jar:lib/ibex.jar:lib/RXTXcomm.jar:build/class${ps}lib/edu.berkeley.sbp.jar -d build/class/ `find build/java -name \*.java` echo 'Main-Class: edu.berkeley.fleet.Main' > build/class/manifest - cd build/class/; jar cmf manifest ../../$@ . + jar cmf build/class/manifest $@ ships -C build/class . + +## Fpga #################################################################################### -## Slipway #################################################################################### +# 32Gb ram, 4-core. small-config:1019s large-config:2530s +host = intel2950-5.eecs.berkeley.edu -#host = sting.eecs.berkeley.edu -#remote_xilinx = /opt/ISE81/ -#remote_dir = fleet/ +# 128Gb ram, 2x4-core. small-config:1189s large-config:3065s +#host = amdr905-1.eecs.berkeley.edu -host = mm2.millennium.berkeley.edu -remote_xilinx = /scratch/megacz/xilinx/ remote_dir = /scratch/megacz/fleet/ -xilinx = cd build; -xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(XILINX)/bin/lin -xilinx += XILINX=$(XILINX) -xilinx += PATH=$$PATH:$(XILINX)/bin/lin -xilinx += $(XILINX)/bin/lin/ -remote_run = skill a.out; -remote_run += user_unprogram 1; -remote_run += user_program 1 main.bit; -remote_run += echo compiling; -remote_run += gcc test.c; -remote_run += echo running; -remote_run += ./a.out /dev/selectmap1 fleet.bin +#host = mm2.millennium.berkeley.edu +#remote_ise = /scratch/megacz/xilinx/ise/ +#remote_edk = /scratch/megacz/xilinx/edk/ +#remote_dir = /scratch/megacz/fleet/ -verilog_files = $(shell find src -name \*.v) -verilog_files += $(shell find src -name \*.inc) -runfpga: fleet.jar - $(java) -jar fleet.jar target=fpga run +xilinx = cd build/fpga; +xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin +xilinx += PATH=$$PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin +#xilinx += XST_VERSION=9.2i +xilinx += XILINX=$(remote_ise) +xilinx += XIL_XST_HIDEMESSAGES=hdl_and_low_levels +xilinx += XIL_PAR_DESIGN_CHECK_VERBOSE=1 +xilinx += XILINX_EDK=$(remote_edk) -mrunfpga: fleet.jar build/main.bit - mkdir -p build - $(java) $(cp) $(interpreter_class) --dump-code - rsync -zare ssh --progress --verbose build/main.bit root@bee441.cs.berkeley.edu:/var/slipway/megacz.bit - #bitfile option doesn't work - #$(java) -jar fleet.jar bitfile=megacz.bit target=fpga run +xilinx_ise = $(xilinx) $(remote_ise)/bin/lin/ +xilinx_edk = $(xilinx) $(remote_edk)/bin/lin/ + +# ML410 +#part = xc4vfx60 +#package = ff1152 +#speed_grade = 11 +#board = ml410 +#runhost=goliath + +device = ${part}-${package}-${speed_grade} +rsync = rsync --exclude=.git --exclude=chips/marina/images -zare ssh --progress --verbose -build/fabric.v: $(verilog_files) src/edu/berkeley/fleet/slipway/Slipway.java - make fleet.jar +upload: fleet.jar build/fpga/main.bit mkdir -p build - $(java) $(cp) $(interpreter_class) --dump-fabric > build/fabric.v + chmod +x misc/program.sh + ${rsync} fleet.jar build/fpga/main.bit misc root@${runhost}:fleet/ -build/main.bit: build/fabric.v $(verilog_files) - make fleet.jar +build/fpga/main.bit: $(java_files) $(ship_files) + make fleet.jar impl=${impl} + mkdir -p build/fpga + $(java) $(cp) edu.berkeley.fleet.fpga.Fpga build/fpga/ + cp src/edu/berkeley/fleet/fpga/* build/fpga || true for A in `find ships -name \*.ship`;\ - do java -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\ + do $(java) -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\ done - rsync -zare ssh --progress --delete --verbose ./ ${host}:${remote_dir} - ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_xilinx}' - scp ${host}:${remote_dir}/build/main.bit build/ + ssh ${host} 'mkdir -p ${remote_dir}' + ${rsync} --delete ./ ${host}:${remote_dir} + time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_ise} remote_ise=${remote_ise} remote_edk=${remote_edk} impl=${impl}' + scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/ + scp ${host}:${remote_dir}/build/fpga/main.ace build/fpga/ || true +pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores +intstyle = -intstyle xflow synth: - cd build; ln -sf ../src/edu/berkeley/fleet/slipway/* . - cd build; echo work > main.lso - cd build; for A in *.v; do echo verilog work \""$$A"\"; done > main.prj - cd build; mkdir -p tmp - cd build; mkdir -p xst - rm -rf build/_ngo - $(xilinx)xst -intstyle ise -ifn main.xst -ofn main.syr < main.xst - $(xilinx)ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc main.ucf -p xc2vp70-ff1704-6 main.ngc main.ngd - $(xilinx)map -intstyle ise -p xc2vp70-ff1704-6 -cm speed -l -pr b -k 4 -c 100 -tx off -o main_map.ncd main.ngd main.pcf - $(xilinx)par -w -intstyle ise -pl std -ol std -t 99 main_map.ncd main.ncd main.pcf - $(xilinx)bitgen -intstyle ise -d -f main.ut main.ncd -# $(xilinx)trce -intstyle ise -e 3 -l 3 -s 6 -xml main main.ncd -o main.twr main.pcf + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* . + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* . + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/ddr2/* . + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/dvi/* . + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/zbt/* . + cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/bee2/* . + rm -f build/fpga/main.lso + echo work >> build/fpga/main.lso + rm -f build/fpga/main.prj + cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done >> main.prj + cd build/fpga; for A in *.vhd; do echo vhdl work \""$$A"\"; done >> main.prj + cd build/fpga; touch main.ini + cd build/fpga; mkdir -p tmp + cd build/fpga; mkdir -p xst + rm -rf build/fpga/_ngo + skill xst_original + + rm -f build/fpga/main.xst + echo "set -tmpdir ./tmp" >> build/fpga/main.xst + echo "set -xsthdpdir ./xst" >> build/fpga/main.xst + echo "set -xsthdpini main.ini" >> build/fpga/main.xst + echo -n "run" >> build/fpga/main.xst + echo -n " -ifn main.prj" >> build/fpga/main.xst + echo -n " -ifmt mixed" >> build/fpga/main.xst + echo -n " -ofn main" >> build/fpga/main.xst + echo -n " -ofmt NGC" >> build/fpga/main.xst + echo -n " -p ${device}" >> build/fpga/main.xst + echo -n " -top main" >> build/fpga/main.xst + echo -n " -opt_mode ${opt_for}" >> build/fpga/main.xst + echo -n " -opt_level 2" >> build/fpga/main.xst + echo -n " -iuc NO" >> build/fpga/main.xst + echo -n " -lso main.lso" >> build/fpga/main.xst + echo -n " -keep_hierarchy NO" >> build/fpga/main.xst + echo -n " -rtlview Yes" >> build/fpga/main.xst + echo -n " -glob_opt AllClockNets" >> build/fpga/main.xst + echo -n " -read_cores YES" >> build/fpga/main.xst + echo -n " -write_timing_constraints NO" >> build/fpga/main.xst + echo -n " -cross_clock_analysis YES" >> build/fpga/main.xst + echo -n " -hierarchy_separator /" >> build/fpga/main.xst + echo -n " -bus_delimiter <>" >> build/fpga/main.xst + echo -n " -case maintain" >> build/fpga/main.xst + echo -n " -slice_utilization_ratio 100" >> build/fpga/main.xst + echo -n " -verilog2001 YES" >> build/fpga/main.xst + echo -n " -fsm_extract Yes" >> build/fpga/main.xst + echo -n " -fsm_encoding Auto" >> build/fpga/main.xst + echo -n " -safe_implementation No" >> build/fpga/main.xst + echo -n " -fsm_style lut" >> build/fpga/main.xst + echo -n " -ram_extract Yes" >> build/fpga/main.xst + echo -n " -ram_style Auto" >> build/fpga/main.xst + echo -n " -rom_extract Yes" >> build/fpga/main.xst + echo -n " -mux_style Auto" >> build/fpga/main.xst + echo -n " -decoder_extract YES" >> build/fpga/main.xst + echo -n " -priority_extract YES" >> build/fpga/main.xst + echo -n " -shreg_extract YES" >> build/fpga/main.xst + echo -n " -shift_extract YES" >> build/fpga/main.xst + echo -n " -xor_collapse YES" >> build/fpga/main.xst + echo -n " -rom_style Auto" >> build/fpga/main.xst + echo -n " -mux_extract YES" >> build/fpga/main.xst + echo -n " -resource_sharing YES" >> build/fpga/main.xst + echo -n " -mult_style auto" >> build/fpga/main.xst + echo -n " -iobuf YES" >> build/fpga/main.xst + echo -n " -max_fanout 10000" >> build/fpga/main.xst + echo -n " -bufg 1" >> build/fpga/main.xst + echo -n " -register_duplication YES" >> build/fpga/main.xst + echo -n " -register_balancing Yes" >> build/fpga/main.xst + echo -n " -slice_packing Yes" >> build/fpga/main.xst + echo -n " -optimize_primitives Yes" >> build/fpga/main.xst + echo -n " -tristate2logic Yes" >> build/fpga/main.xst + echo -n " -use_clock_enable Yes" >> build/fpga/main.xst + echo -n " -use_sync_set Yes" >> build/fpga/main.xst + echo -n " -use_sync_reset Yes" >> build/fpga/main.xst + echo -n " -iob auto" >> build/fpga/main.xst + echo -n " -equivalent_register_removal YES" >> build/fpga/main.xst + echo -n " -slice_utilization_ratio_maxmargin 5" >> build/fpga/main.xst + echo >> build/fpga/main.xst + + rm -f build/fpga/main.ut +ifneq ($(impl),bee2) + echo '-w' >> build/fpga/main.ut + echo '-g CclkPin:PULLUP' >> build/fpga/main.ut + echo '-g TdoPin:PULLNONE' >> build/fpga/main.ut + echo '-g M1Pin:PULLDOWN' >> build/fpga/main.ut + echo '-g DonePin:PULLUP' >> build/fpga/main.ut + echo '-g DriveDone:No' >> build/fpga/main.ut + echo '-g StartUpClk:JTAGCLK' >> build/fpga/main.ut + echo '-g DONE_cycle:4' >> build/fpga/main.ut + echo '-g GTS_cycle:5' >> build/fpga/main.ut + echo '-g M0Pin:PULLUP' >> build/fpga/main.ut + echo '-g M2Pin:PULLUP' >> build/fpga/main.ut + echo '-g ProgPin:PULLUP' >> build/fpga/main.ut + echo '-g TckPin:PULLUP' >> build/fpga/main.ut + echo '-g TdiPin:PULLUP' >> build/fpga/main.ut + echo '-g TmsPin:PULLUP' >> build/fpga/main.ut + echo '-g DonePipe:No' >> build/fpga/main.ut + echo '-g GWE_cycle:6' >> build/fpga/main.ut + echo '-g LCK_cycle:NoWait' >> build/fpga/main.ut + echo '-g Security:NONE' >> build/fpga/main.ut + echo '-g Persist:No' >> build/fpga/main.ut +endif +ifeq ($(impl),bee2) + echo '-w' >> build/fpga/main.ut + echo '-g DebugBitstream:No' >> build/fpga/main.ut + echo '-g Binary:no' >> build/fpga/main.ut + echo '-g CRC:Enable' >> build/fpga/main.ut + echo '-g ConfigRate:4' >> build/fpga/main.ut + echo '-g CclkPin:PullUp' >> build/fpga/main.ut + echo '-g M0Pin:PullUp' >> build/fpga/main.ut + echo '-g M1Pin:PullUp' >> build/fpga/main.ut + echo '-g M2Pin:PullUp' >> build/fpga/main.ut + echo '-g ProgPin:PullUp' >> build/fpga/main.ut + echo '-g DonePin:PullUp' >> build/fpga/main.ut + echo '-g PowerdownPin:PullUp' >> build/fpga/main.ut + echo '-g TckPin:PullUp' >> build/fpga/main.ut + echo '-g TdiPin:PullUp' >> build/fpga/main.ut + echo '-g TdoPin:PullNone' >> build/fpga/main.ut + echo '-g TmsPin:PullUp' >> build/fpga/main.ut + echo '-g UnusedPin:PullDown' >> build/fpga/main.ut + echo '-g UserID:0xFFFFFFFF' >> build/fpga/main.ut + echo '-g DCMShutdown:Disable' >> build/fpga/main.ut + echo '-g DisableBandgap:No' >> build/fpga/main.ut + echo '-g DCIUpdateMode:AsRequired' >> build/fpga/main.ut + echo '-g StartUpClk:CClk' >> build/fpga/main.ut + echo '-g DONE_cycle:4' >> build/fpga/main.ut + echo '-g GTS_cycle:5' >> build/fpga/main.ut + echo '-g GWE_cycle:6' >> build/fpga/main.ut + echo '-g LCK_cycle:NoWait' >> build/fpga/main.ut + echo '-g Security:None' >> build/fpga/main.ut + echo '-g DonePipe:No' >> build/fpga/main.ut + echo '-g DriveDone:No' >> build/fpga/main.ut + echo '-g Encrypt:No' >> build/fpga/main.ut +endif + $(xilinx_ise)xst ${intstyle} -ifn main.xst -ofn main.syr < main.xst \ + | grep --line-buffered -v 'been backward balanced into' \ + | grep --line-buffered -v 'IDDR has been replaced by IDDR_2CLK' \ + | grep --line-buffered -v 'WARNING:Xst:616 - Invalid property' + cat build/fpga/*.ucf > build/fpga/main.ucf + $(xilinx_ise)ngdbuild ${intstyle} -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd + $(xilinx_ise)map ${intstyle} -ol ${effort} -p $(device) -pr b -cm ${opt_for} -o main_map.ncd main.ngd main.pcf + $(xilinx_ise)par ${intstyle} -pl ${effort} -ol ${effort} -w main_map.ncd main.ncd main.pcf + $(xilinx_ise)trce ${intstyle} -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf + $(xilinx_ise)bitgen ${intstyle} -f main.ut main.ncd +ifneq ($(impl),bee2) + $(xilinx) tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ${board} -ace mainx.ace + mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same? +endif + +runserver: fleet.jar + $(java) -Djava.library.path=lib -cp fleet.jar:lib/RXTXcomm.jar edu.berkeley.fleet.fpga.Server + +test: fleet.jar + $(java) -jar fleet.jar test ships/*.ship tests + $(java) -cp fleet.jar edu.berkeley.fleet.dataflow.MergeSort Memory 0 256 + +demo: fleet.jar + $(java) -cp fleet.jar edu.berkeley.fleet.dataflow.SortingDemo +## Manual #################################################################################### -doc: fleet.jar - $(java) $(cp) edu.berkeley.fleet.doc.Doc < ships/Alu2.ship +svgs = $(shell find doc -name \*.svg) +%.eps: %.svg + DISPLAY= /Applications/Inkscape.app/Contents//Resources/bin/inkscape -z --export-area-drawing $^ --export-eps=$@ -test: fleet.jar; $(java) -jar fleet.jar test tests/ +%.pdf: %.eps + epstopdf $^ --outfile=$@ + +manual: archmanual toolmanual + +archmanual: fleet.jar $(svgs:%.svg=%.pdf) + $(java) -jar fleet.jar doc + cd .tmp; ln -sf ../doc/*.bib . + cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex + cd .tmp; for A in *.mp; do mpost --tex=latex $$A; done + cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex + open .tmp/FleetTwo.Manual.pdf +toolmanual: fleet.jar $(svgs:%.svg=%.pdf) + $(java) -jar fleet.jar doc + cd .tmp; ln -sf ../doc/*.bib . + cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex toolchain.tex + open .tmp/toolchain.pdf ## API docs #################################################################################### javadoc: - mkdir -p doc/api javadoc \ - -classpath lib/edu.berkeley.sbp.jar \ -linksource \ - -windowtitle "Fleet API" \ + -windowtitle "FleetCode API Documentation" \ -sourcepath src \ - -header "Fleet
API" \ + -header "FleetCode API Documentation
" \ -public \ -notree \ - -noindex \ -nonavbar \ + -noqualifier all \ -stylesheetfile doc/javadoc.css \ + -d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc/ \ + edu.berkeley.fleet.api + javadoc \ + -linksource \ + -windowtitle "FleetCode API Documentation" \ + -sourcepath src \ + -header "FleetCode API Documentation
" \ + -public \ + -notree \ + -nonavbar \ -noqualifier all \ - -d doc/api \ - edu.berkeley.fleet.api \ - edu.berkeley.fleet.assembler + -stylesheetfile doc/javadoc.css \ + -d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc-private/ \ + `find src/edu/berkeley/fleet -name \*.java` + open http://fleet.cs.berkeley.edu/code/javadoc/ + open http://fleet.cs.berkeley.edu/code/javadoc-private/ ## Misc #################################################################################### clean: rm -rf fleet.jar build + rm -f \ + chips/marina/testCode/marina.xml \ + chips/marina/testCode/marina.v \ + chips/marina/testCode/marina.schematic-parasitics.spi ## Dist #################################################################################### -dist: - darcs record - darcs push /afs/research.cs.berkeley.edu/class/fleet/website/repos/fleet/ - darcs get . --repo-name=fleet-`date +%d.%h.%y` - make -C fleet-`date +%d.%h.%y` fleet.jar - rm -rf fleet-`date +%d.%h.%y`/build - cp _darcs/prefs/defaultrepo fleet-`date +%d.%h.%y`/_darcs/prefs/defaultrepo - tar cvzf fleet-`date +%d.%h.%y`.tgz fleet-`date +%d.%h.%y` - rm -rf fleet-`date +%d.%h.%y` - mv fleet-`date +%d.%h.%y`.tgz /afs/research.cs.berkeley.edu/class/fleet/website/files/ - @echo - @echo - @echo http://research.cs.berkeley.edu/class/fleet/files/fleet-`date +%d.%h.%y`.tgz - @echo +#dist: +# darcs record +# darcs push /afs/research.cs.berkeley.edu/class/fleet/website/repos/fleet/ +# darcs get . --repo-name=fleet-`date +%d.%h.%y` +# make -C fleet-`date +%d.%h.%y` fleet.jar +# rm -rf fleet-`date +%d.%h.%y`/build +# echo 'http://research.cs.berkeley.edu/class/fleet/repos/fleet/' > \ +# fleet-`date +%d.%h.%y`/_darcs/prefs/defaultrepo +# tar cvzf fleet-`date +%d.%h.%y`.tgz fleet-`date +%d.%h.%y` +# rm -rf fleet-`date +%d.%h.%y` +# mv fleet-`date +%d.%h.%y`.tgz /afs/research.cs.berkeley.edu/class/fleet/website/files/ +# @echo +# @echo +# @echo http://research.cs.berkeley.edu/class/fleet/files/fleet-`date +%d.%h.%y`.tgz +# @echo +# @echo +# + +dist: fleet.jar + darcs dist -d fleet + mv fleet.tar.gz /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.tgz + mkdir -p .build + cd .build; for A in ../fleet.jar ../lib/*.jar; do jar xvf $$A; done + cd .build; jar cvf /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.jar . + rm -rf .build + echo + echo http://fleet.cs.berkeley.edu/code/snapshots/fleet-`date +%Y.%m.%d`.jar + echo + +# you'll probably want to change this line +ghc = /usr/local/brian/ghc/compiler/ghc-inplace + +ghc += -fglasgow-exts -fallow-undecidable-instances -fallow-overlapping-instances -cpp +ghc += -i$(shell pwd)/build/hi/ -hidir $(shell pwd)/build/hi/ -odir $(shell pwd)/build/class/ + +f0: fleet.jar + mkdir -p build/hi build/class + cd lib; $(ghc) -c -java SBP.lhs + cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Util.lhs + cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Fleet.lhs + cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Types.lhs + cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Compile.lhs + cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Main.lhs + $(java) -cp build/class:lib/HSbase.jar:lib/HSrts.jar:lib/HSstm.jar:fleet.jar Main + + +## Targets below are for integration with Sun-Proprietary Marina Test Chip ############################## + +electric_jar = ~/proj/electric/srcj/electric.jar +electric = java -Xss2m -XX:MaxPermSize=128m -Xmx2000m -jar ${electric_jar} +electric_headless = java -Xmx1500m -jar -Djava.awt.headless=true ${electric_jar} -batch +all_electric_files = $(shell find chips/marina/electric/ -name \*.jelib -or -path \*.delib\*) +modname = fakeMarinaPadframe + +sun_server = simmons-tunnel + +#sun_server = frehley # electric team uses frehley +#sun_server = simmons +#sun_server = criss # criss is used for nohupped nanosim +#sun_server = stanley # stanley is used for nohupped hsim + +testnum = 0 + +runtest: fleet.jar chips/marina/testCode/marina.xml chips/marina/testCode/marina.v chips/marina/testCode/marina.schematic-parasitics.spi + ${rsync} --delete ./ ${sun_server}:~/fleet/ + time ssh -t -Y ${sun_server} 'cd ~/fleet/; make testlocal impl=${impl}' + +silicon: fleet.jar chips/marina/testCode/marina.xml + ${rsync} --delete ./ ${sun_server}:~/fleet/ + time ssh -t -Y ${sun_server} 'cd ~/fleet/; make siliconlocal impl=${impl}' + +spice: fleet.jar + cp ~/omegaCounter.spi chips/marina/testCode/omegaCounter.spi + cp ~/omegaCounter-extracted.spi chips/marina/testCode/omegaCounter-extracted.spi + rsync -azre ssh --delete --progress --verbose ./ ${sun_server}:~/fleet/ + ssh -t -Y ${sun_server} 'cd ~/fleet/chips/marina/testCode/; export PATH=/proj/async/cad/linux/bin/:$$PATH; echo -e "rcf commands\n" | hsim64 -time 90000 go.spi -o go.spi' + + +testlocal: fleet.jar + cd chips/marina/testCode; \ + export PATH=/proj/async/cad/linux/bin/:$$PATH; \ + /proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java \ + -cp `pwd`/../../../lib/com.sun.async.test.jar:`pwd`/../../../fleet.jar \ + -Dfleet.impl=com.sun.vlsi.chips.marina.test.Marina \ + com.sun.vlsi.chips.marina.test.MarinaTest \ + -hsim \ + -testNum ${testnum} || tail -n 20 marina.spi.run + +siliconlocal: fleet.jar + cd chips/marina/testCode; \ + export PATH=/proj/async/cad/linux/bin/:$$PATH; \ + /proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java \ + -cp `pwd`/../../../lib/com.sun.async.test.jar:`pwd`/../../../fleet.jar \ + -Djava.library.path=/proj/async/cad/test/ \ + -Dfleet.impl=com.sun.vlsi.chips.marina.test.Marina \ + com.sun.vlsi.chips.marina.test.MarinaTest \ + -silicon \ + -testNum ${testnum} + +chips/marina/testCode/marina.xml \ +chips/marina/testCode/marina.v \ +chips/marina/testCode/marina.schematic-parasitics.spi: ${all_electric_files} @echo + @echo == Rebuilding Netlists and XML =========================================================== + rm -f chips/marina/testCode/marina.v + rm -f chips/marina/testCode/marina.schematic-parasitics.spi + rm -f chips/marina/testCode/marina.xml + cd chips/marina/testCode; \ + nice -n 19 ${electric_headless} -s regen.bsh ../electric/aMarinaM.jelib +electric: + ${electric} chips/marina/electric/aMarinaM.jelib +sync: + ${rsync} ${sun_server}:fleet/chips/marina/testCode/marina\*.dump ~/ || true + ${rsync} ${sun_server}:fleet/chips/marina/testCode/marina.spi.out ~/${modname}.out || true +copyin: + cp ~/${modname}.spi chips/marina/testCode/marina.schematic-parasitics.spi || true + cp ~/${modname}.v chips/marina/testCode/marina.v || true + +chips/marina/testCode/omegaCounter-extracted.spi: ${all_electric_files} chips/marina/testCode/rcx.bsh + @echo + @echo == Extracting Layout =========================================================== + ssh ${sun_server} 'rm -rf /tmp/am77536; mkdir /tmp/am77536' + cd chips/marina/testCode; \ + nice -n 19 ${electric_headless} -s rcx.bsh ../electric/omegaCounter.jelib + mv chips/marina/electric/starrcxt/omegaCounter.sp $@