X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=Makefile;h=e5b1a9e69f5f9b6b1ddd09968c85d516f125b26c;hb=bbaf73d28eceafb7643edc02e2117da7cfb9aec9;hp=32f652c59e73241ada676413eb4dc38e4555c4e1;hpb=50f89d7a5b6f96b87351bd886f7b2e86595135f8;p=fleet.git
diff --git a/Makefile b/Makefile
index 32f652c..e5b1a9e 100644
--- a/Makefile
+++ b/Makefile
@@ -29,53 +29,156 @@ fleet.jar: $(java_files) $(ship_files) src/edu/berkeley/fleet/assembler/fleet.g
## Fpga ####################################################################################
-host = intel2950-3.eecs.berkeley.edu
-remote_xilinx = /scratch/megacz/xilinx/
+host = intel2950-5.eecs.berkeley.edu
+remote_ise = /tools/xilinx/ISE9.1i_lin
+remote_edk = /tools/xilinx/EDK9.1i
remote_dir = /scratch/megacz/fleet/
#host = mm2.millennium.berkeley.edu
-#remote_xilinx = /scratch/megacz/xilinx/
+#remote_ise = /scratch/megacz/xilinx/ise/
+#remote_edk = /scratch/megacz/xilinx/edk/
#remote_dir = /scratch/megacz/fleet/
+
xilinx = cd build/fpga;
-xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(XILINX)/bin/lin
-xilinx += XILINX=$(XILINX)
-xilinx += PATH=$$PATH:$(XILINX)/bin/lin
-xilinx += $(XILINX)/bin/lin/
+xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
+xilinx += PATH=$$PATH:$(remote_ise)/bin/lin:$(remote_edk)/bin/lin
+xilinx += XST_VERSION=9.2i
+xilinx += XILINX=$(remote_ise)
+xilinx += XIL_XST_HIDEMESSAGES=hdl_and_low_levels
+xilinx += XILINX_EDK=$(remote_edk)
+
+xilinx_ise = $(xilinx) $(remote_ise)/bin/lin/
+xilinx_edk = $(xilinx) $(remote_edk)/bin/lin/
-device = xc4vfx60-11ff1152
+speed_grade = 11
+device = xc4vfx60ff1152-${speed_grade}
+#device = xc2vp70-7ff1704
upload: fleet.jar build/fpga/main.bit
mkdir -p build
+ chmod +x misc/program.sh
rsync -are ssh --progress --verbose ./ root@goliath:fleet/
build/fpga/main.bit: $(java_files) $(ship_files)
make fleet.jar
mkdir -p build/fpga
$(java) $(cp) edu.berkeley.fleet.fpga.Fpga build/fpga/
- cp src/edu/berkeley/fleet/fpga/* build/fpga
+ cp src/edu/berkeley/fleet/fpga/* build/fpga || true
for A in `find ships -name \*.ship`;\
do java -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\
done
rsync -zare ssh --progress --delete --verbose ./ ${host}:${remote_dir}
- time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_xilinx}'
+ time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_ise} remote_ise=${remote_ise} remote_edk=${remote_edk}'
scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/
+pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores
synth:
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
- cd build/fpga; echo work > main.lso
- cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done > main.prj
+ cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* .
+ rm -f build/fpga/main.lso
+ echo work >> build/fpga/main.lso
+ rm -f build/fpga/main.prj
+ cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done >> main.prj
+ cd build/fpga; touch main.ini
cd build/fpga; mkdir -p tmp
cd build/fpga; mkdir -p xst
rm -rf build/fpga/_ngo
- $(xilinx)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
- $(xilinx)ngdbuild -aul -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
- $(xilinx)map -intstyle xflow -p $(device) -cm speed -l -pr b -k 4 -c 100 -tx off -o main_map.ncd main.ngd main.pcf
- $(xilinx)par -w -intstyle xflow -pl std -ol std -t 99 main_map.ncd main.ncd main.pcf
- $(xilinx)bitgen -intstyle xflow -d -f main.ut main.ncd
-# $(xilinx)trce -intstyle xflow -e 3 -l 3 -s 6 -xml main main.ncd -o main.twr main.pcf
-
-
+ skill xst_original
+
+ rm -f build/fpga/main.xst
+ echo "set -tmpdir ./tmp" >> build/fpga/main.xst
+ echo "set -xsthdpdir ./xst" >> build/fpga/main.xst
+ echo "set -xsthdpini main.ini" >> build/fpga/main.xst
+ echo -n "run" >> build/fpga/main.xst
+ echo -n " -ifn main.prj" >> build/fpga/main.xst
+ echo -n " -ifmt mixed" >> build/fpga/main.xst
+ echo -n " -ofn main" >> build/fpga/main.xst
+ echo -n " -ofmt NGC" >> build/fpga/main.xst
+ echo -n " -p xc4vfx60-11ff1152" >> build/fpga/main.xst
+ echo -n " -top main" >> build/fpga/main.xst
+ echo -n " -opt_mode area" >> build/fpga/main.xst
+ echo -n " -opt_level 2" >> build/fpga/main.xst
+ echo -n " -iuc NO" >> build/fpga/main.xst
+ echo -n " -lso main.lso" >> build/fpga/main.xst
+ echo -n " -keep_hierarchy NO" >> build/fpga/main.xst
+ echo -n " -rtlview Yes" >> build/fpga/main.xst
+ echo -n " -glob_opt AllClockNets" >> build/fpga/main.xst
+ echo -n " -read_cores YES" >> build/fpga/main.xst
+ echo -n " -write_timing_constraints NO" >> build/fpga/main.xst
+ echo -n " -cross_clock_analysis YES" >> build/fpga/main.xst
+ echo -n " -hierarchy_separator /" >> build/fpga/main.xst
+ echo -n " -bus_delimiter <>" >> build/fpga/main.xst
+ echo -n " -case maintain" >> build/fpga/main.xst
+ echo -n " -slice_utilization_ratio 100" >> build/fpga/main.xst
+ echo -n " -verilog2001 YES" >> build/fpga/main.xst
+ echo -n " -fsm_extract Yes" >> build/fpga/main.xst
+ echo -n " -fsm_encoding Auto" >> build/fpga/main.xst
+ echo -n " -safe_implementation No" >> build/fpga/main.xst
+ echo -n " -fsm_style lut" >> build/fpga/main.xst
+ echo -n " -ram_extract Yes" >> build/fpga/main.xst
+ echo -n " -ram_style Auto" >> build/fpga/main.xst
+ echo -n " -rom_extract Yes" >> build/fpga/main.xst
+ echo -n " -mux_style Auto" >> build/fpga/main.xst
+ echo -n " -decoder_extract YES" >> build/fpga/main.xst
+ echo -n " -priority_extract YES" >> build/fpga/main.xst
+ echo -n " -shreg_extract YES" >> build/fpga/main.xst
+ echo -n " -shift_extract YES" >> build/fpga/main.xst
+ echo -n " -xor_collapse YES" >> build/fpga/main.xst
+ echo -n " -rom_style Auto" >> build/fpga/main.xst
+ echo -n " -mux_extract YES" >> build/fpga/main.xst
+ echo -n " -resource_sharing YES" >> build/fpga/main.xst
+ echo -n " -mult_style auto" >> build/fpga/main.xst
+ echo -n " -iobuf YES" >> build/fpga/main.xst
+ echo -n " -max_fanout 10000" >> build/fpga/main.xst
+ echo -n " -bufg 1" >> build/fpga/main.xst
+ echo -n " -register_duplication YES" >> build/fpga/main.xst
+ echo -n " -register_balancing Yes" >> build/fpga/main.xst
+ echo -n " -slice_packing Yes" >> build/fpga/main.xst
+ echo -n " -optimize_primitives Yes" >> build/fpga/main.xst
+ echo -n " -tristate2logic Yes" >> build/fpga/main.xst
+ echo -n " -use_clock_enable Yes" >> build/fpga/main.xst
+ echo -n " -use_sync_set Yes" >> build/fpga/main.xst
+ echo -n " -use_sync_reset Yes" >> build/fpga/main.xst
+ echo -n " -iob auto" >> build/fpga/main.xst
+ echo -n " -equivalent_register_removal YES" >> build/fpga/main.xst
+ echo -n " -slice_utilization_ratio_maxmargin 5" >> build/fpga/main.xst
+ echo >> build/fpga/main.xst
+
+ rm -f build/fpga/main.ut
+ echo '-w' >> build/fpga/main.ut
+ echo '-g CclkPin:PULLUP' >> build/fpga/main.ut
+ echo '-g TdoPin:PULLNONE' >> build/fpga/main.ut
+ echo '-g M1Pin:PULLDOWN' >> build/fpga/main.ut
+ echo '-g DonePin:PULLUP' >> build/fpga/main.ut
+ echo '-g DriveDone:No' >> build/fpga/main.ut
+ echo '-g StartUpClk:JTAGCLK' >> build/fpga/main.ut
+ echo '-g DONE_cycle:4' >> build/fpga/main.ut
+ echo '-g GTS_cycle:5' >> build/fpga/main.ut
+ echo '-g M0Pin:PULLUP' >> build/fpga/main.ut
+ echo '-g M2Pin:PULLUP' >> build/fpga/main.ut
+ echo '-g ProgPin:PULLUP' >> build/fpga/main.ut
+ echo '-g TckPin:PULLUP' >> build/fpga/main.ut
+ echo '-g TdiPin:PULLUP' >> build/fpga/main.ut
+ echo '-g TmsPin:PULLUP' >> build/fpga/main.ut
+ echo '-g DonePipe:No' >> build/fpga/main.ut
+ echo '-g GWE_cycle:6' >> build/fpga/main.ut
+ echo '-g LCK_cycle:NoWait' >> build/fpga/main.ut
+ echo '-g Security:NONE' >> build/fpga/main.ut
+ echo '-g Persist:No' >> build/fpga/main.ut
+
+ $(xilinx_ise)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
+ $(xilinx_ise)ngdbuild -aul -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
+ $(xilinx_ise)map -cm area -intstyle xflow -p $(device) -pr b -ol high -o main_map.ncd main.ngd main.pcf
+ $(xilinx_ise)par -w -intstyle xflow -t 99 -pl high -rl high main_map.ncd main.ncd main.pcf
+ $(xilinx_ise)bitgen -intstyle xflow -f main.ut main.ncd
+# $(xilinx_ise)trce -intstyle xflow -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
+ $(xilinx_edk)xmd -tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ml410 -ace mainx.ace
+ mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same?
+
+
+runserver: fleet.jar
+ java -Djava.library.path=lib -cp fleet.jar:lib/RXTXcomm.jar edu.berkeley.fleet.fpga.Server
test: fleet.jar; $(java) -jar fleet.jar test ships/*.ship tests
testfpga: fleet.jar; $(java) -jar fleet.jar target=fpga test ships/*.ship tests
@@ -119,7 +222,20 @@ javadoc:
-stylesheetfile doc/javadoc.css \
-d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc/ \
edu.berkeley.fleet.api
+ javadoc \
+ -linksource \
+ -windowtitle "FleetCode API Documentation" \
+ -sourcepath src \
+ -header "FleetCode API Documentation
" \
+ -public \
+ -notree \
+ -nonavbar \
+ -noqualifier all \
+ -stylesheetfile doc/javadoc.css \
+ -d /afs/research.cs.berkeley.edu/class/fleet/website/code/javadoc-private/ \
+ `find src/edu/berkeley/fleet -name \*.java`
open http://fleet.cs.berkeley.edu/code/javadoc/
+ open http://fleet.cs.berkeley.edu/code/javadoc-private/
## Misc ####################################################################################
@@ -146,9 +262,14 @@ clean:
# @echo
#
-dist:
+dist: fleet.jar
darcs dist -d fleet
- mv fleet.tar.gz /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%y.%m.%d`.tgz
+ mv fleet.tar.gz /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.tgz
+ mkdir -p .build
+ rm -f lib/suncvs.jar
+ cd .build; for A in ../fleet.jar ../lib/*.jar; do jar xvf $$A; done
+ cd .build; jar cvf /afs/research.cs.berkeley.edu/class/fleet/website/code/snapshots/fleet-`date +%Y.%m.%d`.jar .
+ rm -rf .build
# you'll probably want to change this line
ghc = /usr/local/brian/ghc/compiler/ghc-inplace
@@ -166,3 +287,31 @@ f0: fleet.jar
cd src/edu/berkeley/fleet/f0/; $(ghc) -fglasgow-exts -cpp $(hflags) -java Main.lhs
$(java) -cp build/class:lib/HSbase.jar:lib/HSrts.jar:lib/HSstm.jar:fleet.jar Main
+
+## Targets below are for integration with Sun-Proprietary Marina Test Chip ##############################
+
+cleansuncvs:
+ rm -rf lib/suncvs.jar suncvs
+
+lib/suncvs.jar: fleet.jar suncvs/marina suncvs/test
+ rm -rf suncvs/test/manuals
+ mkdir -p suncvs/build
+ cd suncvs; javac -cp ../fleet.jar:test/javamake.jar:test/jcommon.jar:test/jfreechart.jar -d build `find . -name \*.java`
+ cd suncvs/build; jar cvf ../../lib/suncvs.jar .
+ cd suncvs/test; jar uvf ../../lib/suncvs.jar .
+
+runtest: fleet.jar
+ rm lib/suncvs.jar; make lib/suncvs.jar
+ rm -f suncvs/marina/testSims/isolatedInDock.spi.run
+ ssh simmons 'skill nanosim'
+ rsync -are ssh --delete --progress --verbose ./ simmons:~/fleet/
+ ssh simmons 'export PATH=$$PATH:/proj/async/cad/linux/bin/; cp -r /import/async/cad/2008/marina/rkao/marina/testSims/* ~/fleet/suncvs/marina/testSims/; cp -r /import/async/cad/2008/marina/rkao/marina/testCode/*.xml ~/fleet/suncvs/marina/testCode/; cd ~/fleet/suncvs/marina/testSims; /proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java -cp $$HOME/fleet/fleet.jar:$$HOME/fleet/lib/suncvs.jar com.sun.vlsi.chips.marina.test.MarinaTest -testNum 3004'
+
+suncvs/test:
+ mkdir -p suncvs
+ cd suncvs; cvs -d simmons:/import/async/cad/cvs co test
+
+suncvs/marina:
+ mkdir -p suncvs
+ cd suncvs; cvs -d simmons:/import/async/cad/cvs co marina
+