X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FAsmCodeGen.lhs;h=0966404da98036ba7d857db6f0fc5880e9c73a4e;hb=8672676c20d5c9a268a8f07dc7aa706df4ca315f;hp=c9f11d51b269565221b94409c9a1d30f6fef0540;hpb=a8312580d6f089d153d8af668484d4c2eb75e8a8;p=ghc-hetmet.git diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs index c9f11d5..0966404 100644 --- a/compiler/nativeGen/AsmCodeGen.lhs +++ b/compiler/nativeGen/AsmCodeGen.lhs @@ -35,7 +35,7 @@ import qualified GraphColor as Color import Cmm import CmmOpt ( cmmMiniInline, cmmMachOpFold ) -import PprCmm ( pprStmt, pprCmms, pprCmm ) +import PprCmm import MachOp import CLabel import State @@ -43,11 +43,11 @@ import State import UniqFM import Unique ( Unique, getUnique ) import UniqSupply -import FastTypes import List ( groupBy, sortBy ) -import ErrUtils ( dumpIfSet_dyn ) import DynFlags +#if powerpc_TARGET_ARCH import StaticFlags ( opt_Static, opt_PIC ) +#endif import Util import Config ( cProjectVersion ) import Module @@ -278,7 +278,7 @@ cmmNativeGen dflags us cmm -- graph coloring register allocation let ((alloced, regAllocStats), usAlloc) - = {-# SCC "RegAlloc(color)" #-} + = {-# SCC "RegAlloc" #-} initUs usLive $ Color.regAlloc generateRegAllocStats @@ -312,7 +312,7 @@ cmmNativeGen dflags us cmm else do -- do linear register allocation let ((alloced, regAllocStats), usAlloc) - = {-# SCC "RegAlloc(linear)" #-} + = {-# SCC "RegAlloc" #-} initUs usLive $ liftM unzip $ mapUs Linear.regAlloc withLiveness @@ -445,6 +445,9 @@ sequenceTop (CmmProc info lbl params (ListGraph blocks)) = -- output the block, then if it has an out edge, we move the -- destination of the out edge to the front of the list, and continue. +-- FYI, the classic layout for basic blocks uses postorder DFS; this +-- algorithm is implemented in cmm/ZipCfg.hs (NR 6 Sep 2007). + sequenceBlocks :: [NatBasicBlock] -> [NatBasicBlock] sequenceBlocks [] = [] sequenceBlocks (entry:blocks) =