X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FAsmCodeGen.lhs;h=eafeec92df26446addef2a54fb24017db32a97e1;hb=703ca1542c8e0983cc9d8eebce6e9f3dd3fd71e2;hp=8613a8ed1ff06215316d655f81e90dbc2873ef9b;hpb=b04a210e26ca57242fd052f2aa91011a80b76299;p=ghc-hetmet.git diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs index 8613a8e..eafeec9 100644 --- a/compiler/nativeGen/AsmCodeGen.lhs +++ b/compiler/nativeGen/AsmCodeGen.lhs @@ -25,7 +25,6 @@ import Alpha.CodeGen import Alpha.Regs import Alpha.RegInfo import Alpha.Instr -import Alpha.Ppr #elif i386_TARGET_ARCH || x86_64_TARGET_ARCH import X86.CodeGen @@ -37,12 +36,13 @@ import X86.Ppr #elif sparc_TARGET_ARCH import SPARC.CodeGen import SPARC.Regs -import SPARC.RegInfo import SPARC.Instr import SPARC.Ppr +import SPARC.ShortcutJump #elif powerpc_TARGET_ARCH import PPC.CodeGen +import PPC.Cond import PPC.Regs import PPC.RegInfo import PPC.Instr @@ -62,12 +62,14 @@ import qualified RegAlloc.Graph.Stats as Color import qualified RegAlloc.Graph.Coalesce as Color import qualified RegAlloc.Graph.TrivColorable as Color -import qualified TargetReg as Target +import qualified SPARC.CodeGen.Expand as SPARC +import TargetReg import Platform import Instruction import PIC import Reg +import RegClass import NCGMonad import Cmm @@ -195,7 +197,11 @@ nativeCodeGen dflags h us cmms dumpIfSet_dyn dflags Opt_D_dump_asm_conflicts "Register conflict graph" - $ Color.dotGraph Target.targetRegDotColor (Color.trivColorable Target.targetRegClass) + $ Color.dotGraph + targetRegDotColor + (Color.trivColorable + targetVirtualRegSqueeze + targetRealRegSqueeze) $ graphGlobal) @@ -311,13 +317,14 @@ cmmNativeGen dflags us cmm count || dopt Opt_RegsIterative dflags) then do -- the regs usable for allocation - let alloc_regs + let (alloc_regs :: UniqFM (UniqSet RealReg)) = foldr (\r -> plusUFM_C unionUniqSets - $ unitUFM (regClass r) (unitUniqSet r)) + $ unitUFM (targetClassOfRealReg r) (unitUniqSet r)) emptyUFM - $ map RealReg allocatableRegs + $ allocatableRegs - -- graph coloring register allocation + + -- do the graph coloring register allocation let ((alloced, regAllocStats), usAlloc) = {-# SCC "RegAlloc" #-} initUs usLive @@ -385,7 +392,7 @@ cmmNativeGen dflags us cmm count map sequenceTop shorted ---- x86fp_kludge - let final_mach_code = + let kludged = #if i386_TARGET_ARCH {-# SCC "x86fp_kludge" #-} map x86fp_kludge sequenced @@ -393,15 +400,29 @@ cmmNativeGen dflags us cmm count sequenced #endif + ---- expansion of SPARC synthetic instrs +#if sparc_TARGET_ARCH + let expanded = + {-# SCC "sparc_expand" #-} + map SPARC.expandTop kludged + + dumpIfSet_dyn dflags + Opt_D_dump_asm_expanded "Synthetic instructions expanded" + (vcat $ map (docToSDoc . pprNatCmmTop) expanded) +#else + let expanded = + kludged +#endif + return ( usAlloc - , final_mach_code + , expanded , lastMinuteImports ++ imports , ppr_raStatsColor , ppr_raStatsLinear) #if i386_TARGET_ARCH -x86fp_kludge :: NatCmmTop -> NatCmmTop +x86fp_kludge :: NatCmmTop Instr -> NatCmmTop Instr x86fp_kludge top@(CmmData _ _) = top x86fp_kludge top@(CmmProc info lbl params (ListGraph code)) = CmmProc info lbl params (ListGraph $ i386_insert_ffrees code) @@ -476,9 +497,8 @@ makeImportsDoc dflags imports -- fallthroughs. sequenceTop - :: Instruction instr - => NatCmmTop instr - -> NatCmmTop instr + :: NatCmmTop Instr + -> NatCmmTop Instr sequenceTop top@(CmmData _ _) = top sequenceTop (CmmProc info lbl params (ListGraph blocks)) = @@ -552,9 +572,8 @@ reorder id accum (b@(block,id',out) : rest) -- big, we have to work around this limitation. makeFarBranches - :: Instruction instr - => [NatBasicBlock instr] - -> [NatBasicBlock instr] + :: [NatBasicBlock Instr] + -> [NatBasicBlock Instr] #if powerpc_TARGET_ARCH makeFarBranches blocks