X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FMachCodeGen.hs;h=d16962cfbe1ebe56cf121b61d691cd27273f899d;hb=67136d3a04b96b043328df9d4716d3da7a24a517;hp=002adf9a5e2b10ebc4f60b8fd77b3a1d6f33642d;hpb=bddb8ebe61ae38c4f4eb766966cf1caee7fb1de2;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/MachCodeGen.hs b/compiler/nativeGen/MachCodeGen.hs
index 002adf9..d16962c 100644
--- a/compiler/nativeGen/MachCodeGen.hs
+++ b/compiler/nativeGen/MachCodeGen.hs
@@ -25,12 +25,11 @@ module MachCodeGen ( cmmTopCodeGen, InstrBlock ) where
 #include "MachDeps.h"
 
 -- NCG stuff:
-import MachInstrs
-import MachRegs
+import Instrs
+import Regs
 import NCGMonad
 import PositionIndependentCode
 import RegAllocInfo 	( mkBranchInstr, mkRegRegMoveInstr )
-import MachRegs
 import PprMach
 
 -- Our intermediate code:
@@ -371,6 +370,26 @@ iselExpr64 (CmmMachOp (MO_Add _) [e1, CmmLit (CmmInt i _)])
 			r_dst_lo
 
 
+-- Addition of II64
+iselExpr64 (CmmMachOp (MO_Add width) [e1, e2])
+ = do	ChildCode64 code1 r1_lo	<- iselExpr64 e1
+	let r1_hi	= getHiVRegFromLo r1_lo
+
+ 	ChildCode64 code2 r2_lo	<- iselExpr64 e2
+	let r2_hi	= getHiVRegFromLo r2_lo
+	
+	r_dst_lo	<- getNewRegNat II32
+	let r_dst_hi	= getHiVRegFromLo r_dst_lo
+	
+	let code =	code1
+		`appOL`	code2
+		`appOL`	toOL
+			[ ADD False False r1_lo (RIReg r2_lo) r_dst_lo
+			, ADD True  False r1_hi (RIReg r2_hi) r_dst_hi ]
+	
+	return	$ ChildCode64 code r_dst_lo
+
+
 iselExpr64 (CmmReg (CmmLocal (LocalReg uq ty))) | isWord64 ty = do
      r_dst_lo <-  getNewRegNat II32
      let r_dst_hi = getHiVRegFromLo r_dst_lo
@@ -383,6 +402,23 @@ iselExpr64 (CmmReg (CmmLocal (LocalReg uq ty))) | isWord64 ty = do
             ChildCode64 (toOL [mov_hi, mov_lo]) r_dst_lo
          )
 
+-- Convert something into II64
+iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr]) 
+ = do
+	r_dst_lo 	<- getNewRegNat II32
+	let r_dst_hi	= getHiVRegFromLo r_dst_lo
+
+	-- compute expr and load it into r_dst_lo
+	(a_reg, a_code)	<- getSomeReg expr
+
+	let code	= a_code
+		`appOL`	toOL
+			[ mkRegRegMoveInstr g0    r_dst_hi 	-- clear high 32 bits
+			, mkRegRegMoveInstr a_reg r_dst_lo ]
+			
+	return	$ ChildCode64 code r_dst_lo
+
+
 iselExpr64 expr
    = pprPanic "iselExpr64(sparc)" (ppr expr)
 
@@ -3826,6 +3862,7 @@ outOfLineFloatOp_table mop
 	MO_F32_Exp    -> fsLit "expf"
 	MO_F32_Log    -> fsLit "logf"
 	MO_F32_Sqrt   -> fsLit "sqrtf"
+	MO_F32_Pwr    -> fsLit "powf"
 
 	MO_F32_Sin    -> fsLit "sinf"
 	MO_F32_Cos    -> fsLit "cosf"
@@ -3842,6 +3879,7 @@ outOfLineFloatOp_table mop
 	MO_F64_Exp    -> fsLit "exp"
 	MO_F64_Log    -> fsLit "log"
 	MO_F64_Sqrt   -> fsLit "sqrt"
+	MO_F64_Pwr    -> fsLit "pow"
 
 	MO_F64_Sin    -> fsLit "sin"
 	MO_F64_Cos    -> fsLit "cos"
@@ -4272,8 +4310,8 @@ genSwitch expr ids
 			, SLL   e_reg (RIImm $ ImmInt 2) offset_reg
 
 			-- load and jump to the destination
-			, LD 	II32 (AddrRegReg base_reg offset_reg) dst
-			, JMP   (AddrRegImm dst (ImmInt 0)) 
+			, LD 	  II32 (AddrRegReg base_reg offset_reg) dst
+			, JMP_TBL (AddrRegImm dst (ImmInt 0)) [i | Just i <- ids]
 			, NOP ]
 
 #else
@@ -5151,7 +5189,7 @@ coerceFP2Int fromRep toRep x = do
 -- We (allegedly) put the first six C-call arguments in registers;
 -- where do we start putting the rest of them?
 
--- Moved from MachInstrs (SDM):
+-- Moved from Instrs (SDM):
 
 #if alpha_TARGET_ARCH || sparc_TARGET_ARCH
 eXTRA_STK_ARGS_HERE :: Int