X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FMachCodeGen.hs;h=d94a906bbddd79223b88f8b40e5c6a922825f8ce;hb=efbf8ab4eabc1636417b3ea0ca3f5aa227491d9a;hp=1cfc7a3eff722ee436ae5b32263100ed359884ac;hpb=ff124db4ad2ea145a13c711d4da9e293fa82f58d;p=ghc-hetmet.git diff --git a/compiler/nativeGen/MachCodeGen.hs b/compiler/nativeGen/MachCodeGen.hs index 1cfc7a3..d94a906 100644 --- a/compiler/nativeGen/MachCodeGen.hs +++ b/compiler/nativeGen/MachCodeGen.hs @@ -25,12 +25,11 @@ module MachCodeGen ( cmmTopCodeGen, InstrBlock ) where #include "MachDeps.h" -- NCG stuff: -import MachInstrs -import MachRegs +import Instrs +import Regs import NCGMonad import PositionIndependentCode import RegAllocInfo ( mkBranchInstr, mkRegRegMoveInstr ) -import MachRegs import PprMach -- Our intermediate code: @@ -41,6 +40,7 @@ import CLabel import ClosureInfo ( C_SRT(..) ) -- The rest: +import BasicTypes import StaticFlags ( opt_PIC ) import ForeignCall ( CCallConv(..) ) import OrdList @@ -371,6 +371,26 @@ iselExpr64 (CmmMachOp (MO_Add _) [e1, CmmLit (CmmInt i _)]) r_dst_lo +-- Addition of II64 +iselExpr64 (CmmMachOp (MO_Add width) [e1, e2]) + = do ChildCode64 code1 r1_lo <- iselExpr64 e1 + let r1_hi = getHiVRegFromLo r1_lo + + ChildCode64 code2 r2_lo <- iselExpr64 e2 + let r2_hi = getHiVRegFromLo r2_lo + + r_dst_lo <- getNewRegNat II32 + let r_dst_hi = getHiVRegFromLo r_dst_lo + + let code = code1 + `appOL` code2 + `appOL` toOL + [ ADD False False r1_lo (RIReg r2_lo) r_dst_lo + , ADD True False r1_hi (RIReg r2_hi) r_dst_hi ] + + return $ ChildCode64 code r_dst_lo + + iselExpr64 (CmmReg (CmmLocal (LocalReg uq ty))) | isWord64 ty = do r_dst_lo <- getNewRegNat II32 let r_dst_hi = getHiVRegFromLo r_dst_lo @@ -383,6 +403,23 @@ iselExpr64 (CmmReg (CmmLocal (LocalReg uq ty))) | isWord64 ty = do ChildCode64 (toOL [mov_hi, mov_lo]) r_dst_lo ) +-- Convert something into II64 +iselExpr64 (CmmMachOp (MO_UU_Conv _ W64) [expr]) + = do + r_dst_lo <- getNewRegNat II32 + let r_dst_hi = getHiVRegFromLo r_dst_lo + + -- compute expr and load it into r_dst_lo + (a_reg, a_code) <- getSomeReg expr + + let code = a_code + `appOL` toOL + [ mkRegRegMoveInstr g0 r_dst_hi -- clear high 32 bits + , mkRegRegMoveInstr a_reg r_dst_lo ] + + return $ ChildCode64 code r_dst_lo + + iselExpr64 expr = pprPanic "iselExpr64(sparc)" (ppr expr) @@ -3372,7 +3409,7 @@ outOfLineFloatOp mop res args code2 <- stmtToInstrs (CmmAssign (CmmLocal res) (CmmReg (CmmLocal tmp))) return (code1 `appOL` code2) where - lbl = mkForeignLabel fn Nothing False + lbl = mkForeignLabel fn Nothing False IsFunction fn = case mop of MO_F32_Sqrt -> fsLit "sqrtf" @@ -3616,6 +3653,16 @@ genCCall -} + +-- On SPARC under TSO (Total Store Ordering), writes earlier in the instruction stream +-- are guaranteed to take place before writes afterwards (unlike on PowerPC). +-- Ref: Section 8.4 of the SPARC V9 Architecture manual. +-- +-- In the SPARC case we don't need a barrier. +-- +genCCall (CmmPrim (MO_WriteBarrier)) _ _ + = do return nilOL + genCCall target dest_regs argsAndHints = do -- strip hints from the arg regs @@ -3795,7 +3842,7 @@ outOfLineFloatOp mop dflags <- getDynFlagsNat mopExpr <- cmmMakeDynamicReference dflags addImportNat CallReference - $ mkForeignLabel functionName Nothing True + $ mkForeignLabel functionName Nothing True IsFunction let mopLabelOrExpr = case mopExpr of @@ -3816,6 +3863,7 @@ outOfLineFloatOp_table mop MO_F32_Exp -> fsLit "expf" MO_F32_Log -> fsLit "logf" MO_F32_Sqrt -> fsLit "sqrtf" + MO_F32_Pwr -> fsLit "powf" MO_F32_Sin -> fsLit "sinf" MO_F32_Cos -> fsLit "cosf" @@ -3832,6 +3880,7 @@ outOfLineFloatOp_table mop MO_F64_Exp -> fsLit "exp" MO_F64_Log -> fsLit "log" MO_F64_Sqrt -> fsLit "sqrt" + MO_F64_Pwr -> fsLit "pow" MO_F64_Sin -> fsLit "sin" MO_F64_Cos -> fsLit "cos" @@ -4064,7 +4113,7 @@ genCCall target dest_regs argsAndHints do dflags <- getDynFlagsNat mopExpr <- cmmMakeDynamicReference dflags addImportNat CallReference $ - mkForeignLabel functionName Nothing True + mkForeignLabel functionName Nothing True IsFunction let mopLabelOrExpr = case mopExpr of CmmLit (CmmLabel lbl) -> Left lbl _ -> Right mopExpr @@ -4262,8 +4311,8 @@ genSwitch expr ids , SLL e_reg (RIImm $ ImmInt 2) offset_reg -- load and jump to the destination - , LD II32 (AddrRegReg base_reg offset_reg) dst - , JMP (AddrRegImm dst (ImmInt 0)) + , LD II32 (AddrRegReg base_reg offset_reg) dst + , JMP_TBL (AddrRegImm dst (ImmInt 0)) [i | Just i <- ids] , NOP ] #else @@ -5141,7 +5190,7 @@ coerceFP2Int fromRep toRep x = do -- We (allegedly) put the first six C-call arguments in registers; -- where do we start putting the rest of them? --- Moved from MachInstrs (SDM): +-- Moved from Instrs (SDM): #if alpha_TARGET_ARCH || sparc_TARGET_ARCH eXTRA_STK_ARGS_HERE :: Int