X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FMachInstrs.hs;h=e16dbf3b0565cacbd69dc8d01a40e335b9ddd2c5;hb=2922c9ae951271a60db6fd6b2488f9d8111e442e;hp=7b319afc27234e05620cd129f9520e0c0f45f862;hpb=8db404018f101a182c92cc724a8de08cf5ab10ba;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/MachInstrs.hs b/compiler/nativeGen/MachInstrs.hs
index 7b319af..e16dbf3 100644
--- a/compiler/nativeGen/MachInstrs.hs
+++ b/compiler/nativeGen/MachInstrs.hs
@@ -558,9 +558,23 @@ is_G_instr instr
 -- Int Arithmetic.
 	      | ADD	      Bool Bool Reg RI Reg -- x?, cc?, src1, src2, dst
 	      | SUB	      Bool Bool Reg RI Reg -- x?, cc?, src1, src2, dst
+
 	      | UMUL	           Bool Reg RI Reg --     cc?, src1, src2, dst
 	      | SMUL	           Bool Reg RI Reg --     cc?, src1, src2, dst
-              | RDY           Reg	-- move contents of Y register to reg
+
+
+              -- The SPARC divide instructions perform 64bit by 32bit division
+	      --   The Y register is xored into the first operand.
+
+	      --   On _some implementations_ the Y register is overwritten by
+              --   the remainder, so we have to make sure it is 0 each time.
+
+              --   dst <- ((Y `shiftL` 32) `or` src1) `div` src2
+              | UDIV               Bool Reg RI Reg --     cc?, src1, src2, dst
+	      | SDIV               Bool Reg RI Reg --     cc?, src1, src2, dst
+
+              | RDY           Reg                  -- move contents of Y register to reg
+              | WRY           Reg  Reg             -- Y <- src1 `xor` src2
 
 -- Simple bit-twiddling.
 	      | AND	      Bool Reg RI Reg -- cc?, src1, src2, dst