X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAlloc%2FGraph%2FStats.hs;h=5ff7bff91a67507683b03559cdf1806be7e5afb9;hb=f537dd87c4a07526e2b1fc1bd1c125d652833641;hp=339bd4102af8571714330821869e3902b1246377;hpb=d8e54e50fd073c8f599da960ebc40f34905968b2;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/RegAlloc/Graph/Stats.hs b/compiler/nativeGen/RegAlloc/Graph/Stats.hs
index 339bd41..5ff7bff 100644
--- a/compiler/nativeGen/RegAlloc/Graph/Stats.hs
+++ b/compiler/nativeGen/RegAlloc/Graph/Stats.hs
@@ -1,8 +1,6 @@
 {-# OPTIONS -fno-warn-missing-signatures #-}
--- Carries interesting info for debugging / profiling of the 
+-- | Carries interesting info for debugging / profiling of the 
 --	graph coloring register allocator.
---
-
 module RegAlloc.Graph.Stats (
 	RegAllocStats (..),
 
@@ -23,11 +21,14 @@ import qualified GraphColor as Color
 import RegAlloc.Liveness
 import RegAlloc.Graph.Spill
 import RegAlloc.Graph.SpillCost
+import RegAlloc.Graph.TrivColorable
 import Instruction
 import RegClass
 import Reg
+import TargetReg
 
-import Cmm
+import OldCmm
+import OldPprCmm()
 import Outputable
 import UniqFM
 import UniqSet
@@ -45,7 +46,8 @@ data RegAllocStats instr
 
 	-- a spill stage
 	| RegAllocStatsSpill
-	{ raGraph	:: Color.Graph VirtualReg RegClass RealReg	-- ^ the partially colored graph
+	{ raCode	:: [LiveCmmTop instr]				-- ^ the code we tried to allocate registers for
+	, raGraph	:: Color.Graph VirtualReg RegClass RealReg	-- ^ the partially colored graph
 	, raCoalesced	:: UniqFM VirtualReg				-- ^ the regs that were coaleced
 	, raSpillStats	:: SpillStats 					-- ^ spiller stats
 	, raSpillCosts	:: SpillCostInfo 				-- ^ number of instrs each reg lives for
@@ -53,7 +55,8 @@ data RegAllocStats instr
 
 	-- a successful coloring
 	| RegAllocStatsColored
-	{ raGraph	  :: Color.Graph VirtualReg RegClass RealReg	-- ^ the uncolored graph
+	{ raCode	  :: [LiveCmmTop instr]				-- ^ the code we tried to allocate registers for
+	, raGraph	  :: Color.Graph VirtualReg RegClass RealReg	-- ^ the uncolored graph
 	, raGraphColored  :: Color.Graph VirtualReg RegClass RealReg 	-- ^ the coalesced and colored graph
 	, raCoalesced	  :: UniqFM VirtualReg				-- ^ the regs that were coaleced
 	, raCodeCoalesced :: [LiveCmmTop instr]				-- ^ code with coalescings applied 
@@ -69,16 +72,21 @@ instance Outputable instr => Outputable (RegAllocStats instr) where
 	$$ text "#  Native code with liveness information."
 	$$ ppr (raLiveCmm s)
 	$$ text ""
---	$$ text "#  Initial register conflict graph."
---	$$ Color.dotGraph regDotColor trivColorable (raGraph s)
+	$$ text "#  Initial register conflict graph."
+	$$ Color.dotGraph 
+		targetRegDotColor
+		(trivColorable 
+			targetVirtualRegSqueeze
+			targetRealRegSqueeze)
+		(raGraph s)
 
 
  ppr (s@RegAllocStatsSpill{})
  	=  text "#  Spill"
 
---	$$ text "#  Register conflict graph."
---	$$ Color.dotGraph regDotColor trivColorable (raGraph s)
---	$$ text ""
+	$$ text "#  Code with liveness information."
+	$$ (ppr (raCode s))
+	$$ text ""
 
 	$$ (if (not $ isNullUFM $ raCoalesced s)
 		then 	text "#  Registers coalesced."
@@ -86,10 +94,6 @@ instance Outputable instr => Outputable (RegAllocStats instr) where
 			$$ text ""
 		else empty)
 
---	$$ text "#  Spill costs.  reg uses defs lifetime degree cost"
---	$$ vcat (map (pprSpillCostRecord (raGraph s)) $ eltsUFM $ raSpillCosts s)
---	$$ text ""
-
 	$$ text "#  Spills inserted."
 	$$ ppr (raSpillStats s)
 	$$ text ""
@@ -101,13 +105,18 @@ instance Outputable instr => Outputable (RegAllocStats instr) where
  ppr (s@RegAllocStatsColored { raSRMs = (spills, reloads, moves) })
  	=  text "#  Colored"
 
---	$$ text "#  Register conflict graph (initial)."
---	$$ Color.dotGraph regDotColor trivColorable (raGraph s)
---	$$ text ""
+	$$ text "#  Code with liveness information."
+	$$ (ppr (raCode s))
+	$$ text ""
 
---	$$ text "#  Register conflict graph (colored)."
---	$$ Color.dotGraph regDotColor trivColorable (raGraphColored s)
---	$$ text ""
+	$$ text "#  Register conflict graph (colored)."
+	$$ Color.dotGraph 
+		targetRegDotColor
+		(trivColorable 
+			targetVirtualRegSqueeze
+			targetRealRegSqueeze)
+		(raGraphColored s)
+	$$ text ""
 
 	$$ (if (not $ isNullUFM $ raCoalesced s)
 		then 	text "#  Registers coalesced."
@@ -245,7 +254,6 @@ pprStatsLifeConflict stats graph
 
 -- | Count spill/reload/reg-reg moves.
 --	Lets us see how well the register allocator has done.
---
 countSRMs 
 	:: Instruction instr
 	=> LiveCmmTop instr -> (Int, Int, Int)
@@ -258,15 +266,15 @@ countSRM_block (BasicBlock i instrs)
  	return	$ BasicBlock i instrs'
 
 countSRM_instr li
-	| SPILL _ _	<- li
-	= do	modify 	$ \(s, r, m)	-> (s + 1, r, m)
+	| LiveInstr SPILL{} _	 <- li
+	= do	modify  $ \(s, r, m)	-> (s + 1, r, m)
 		return li
 
-	| RELOAD _ _	<- li
-	= do	modify	$ \(s, r, m)	-> (s, r + 1, m)
+	| LiveInstr RELOAD{} _ 	<- li
+	= do	modify  $ \(s, r, m)	-> (s, r + 1, m)
 		return li
-
-	| Instr instr _	<- li
+	
+	| LiveInstr instr _	<- li
 	, Just _	<- takeRegRegMoveInstr instr
 	= do	modify	$ \(s, r, m)	-> (s, r, m + 1)
 		return li
@@ -278,18 +286,3 @@ countSRM_instr li
 addSRM (s1, r1, m1) (s2, r2, m2)
 	= (s1+s2, r1+r2, m1+m2)
 
-
-
-
-
-
-{-
-toX11Color (r, g, b)
- = let	rs	= padL 2 '0' (showHex r "")
- 	gs	= padL 2 '0' (showHex r "")
-	bs	= padL 2 '0' (showHex r "")
-
-	padL n c s
-		= replicate (n - length s) c ++ s
-  in	"#" ++ rs ++ gs ++ bs
--}