X-Git-Url: http://git.megacz.com/?a=blobdiff_plain;f=compiler%2FnativeGen%2FRegAlloc%2FLinear%2FMain.hs;h=229fd32f5722f53ff5c2dec7cbf20dd56845c86e;hb=85981a6fc4bb94af433b0b3655c26c5ec4dda1bd;hp=7201207c790e7268a3d9121c7a409e22df589117;hpb=a2a67cd520b9841114d69a87a423dabcb3b4368e;p=ghc-hetmet.git

diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
index 7201207..229fd32 100644
--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
+++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
@@ -132,20 +132,16 @@ regAlloc (CmmData sec d)
 		( CmmData sec d
 		, Nothing )
 	
-regAlloc (CmmProc (LiveInfo info _ _) lbl params (ListGraph []))
+regAlloc (CmmProc (LiveInfo info _ _) lbl params [])
 	= return ( CmmProc info lbl params (ListGraph [])
 		 , Nothing )
 	
-regAlloc (CmmProc static lbl params (ListGraph comps))
-	| LiveInfo info (Just first_id) block_live	<- static
+regAlloc (CmmProc static lbl params sccs)
+	| LiveInfo info (Just first_id) (Just block_live)	<- static
 	= do	
  		-- do register allocation on each component.
 		(final_blocks, stats)
-			<- linearRegAlloc first_id block_live 
-			$ map (\b -> case b of 
-					BasicBlock _ [b]	-> AcyclicSCC b
-					BasicBlock _ bs		-> CyclicSCC  bs)
-			$ comps
+			<- linearRegAlloc first_id block_live sccs
 
 		-- make sure the block that was first in the input list
 		--	stays at the front of the output